diff options
| author | Thomas Gleixner <[email protected]> | 2020-06-11 15:17:57 +0200 |
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2020-06-11 15:17:57 +0200 |
| commit | f77d26a9fc525286bcef3d4f98b52e17482cf49c (patch) | |
| tree | 6b179c9aa84787773cb601a14a64255e2912154b /drivers/pci/controller/dwc/pcie-designware.h | |
| parent | b6bea24d41519e8c31e4798f1c1a3f67e540c5d0 (diff) | |
| parent | f0178fc01fe46bab6a95415f5647d1a74efcad1b (diff) | |
Merge branch 'x86/entry' into ras/core
to fixup conflicts in arch/x86/kernel/cpu/mce/core.c so MCE specific follow
up patches can be applied without creating a horrible merge conflict
afterwards.
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.h')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index d6e1f397e6b0..656e00f8fbeb 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -112,9 +112,10 @@ #define PCIE_ATU_UNR_REGION_CTRL2 0x04 #define PCIE_ATU_UNR_LOWER_BASE 0x08 #define PCIE_ATU_UNR_UPPER_BASE 0x0C -#define PCIE_ATU_UNR_LIMIT 0x10 +#define PCIE_ATU_UNR_LOWER_LIMIT 0x10 #define PCIE_ATU_UNR_LOWER_TARGET 0x14 #define PCIE_ATU_UNR_UPPER_TARGET 0x18 +#define PCIE_ATU_UNR_UPPER_LIMIT 0x20 /* * The default address offset between dbi_base and atu_base. Root controller |