diff options
| author | Vidya Sagar <vidyas@nvidia.com> | 2019-06-25 14:52:38 +0530 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-06-27 12:02:46 +0100 |
| commit | ca98329d3b58ef636b8f455b0b1b6ac9c89738b2 (patch) | |
| tree | ed9cd073b57b427ba42fb6706042a0a7d32d2932 /drivers/pci/controller/dwc/pcie-designware-host.c | |
| parent | 7bc082d7e97009f252bd432de5d476b0bcf3b266 (diff) | |
PCI: dwc: Export APIs to support .remove() implementation
Export all configuration space access APIs and also other APIs to
support host controller drivers of dwc core based implementations while
adding support for .remove() hook to build their respective drivers as
modules.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index d069e4290180..f93252d0da5b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -311,6 +311,7 @@ void dw_pcie_msi_init(struct pcie_port *pp) dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target)); } +EXPORT_SYMBOL_GPL(dw_pcie_msi_init); int dw_pcie_host_init(struct pcie_port *pp) { @@ -495,6 +496,7 @@ err_free_msi: dw_pcie_free_msi(pp); return ret; } +EXPORT_SYMBOL_GPL(dw_pcie_host_init); void dw_pcie_host_deinit(struct pcie_port *pp) { @@ -503,6 +505,7 @@ void dw_pcie_host_deinit(struct pcie_port *pp) if (pci_msi_enabled() && !pp->ops->msi_host_init) dw_pcie_free_msi(pp); } +EXPORT_SYMBOL_GPL(dw_pcie_host_deinit); static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val, @@ -695,3 +698,4 @@ void dw_pcie_setup_rc(struct pcie_port *pp) val |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); } +EXPORT_SYMBOL_GPL(dw_pcie_setup_rc); |