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| author | Jim Quinlan <jquinlan@broadcom.com> | 2020-09-11 13:52:28 -0400 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-10-02 12:40:40 +0100 |
| commit | 3baec684a531866a39d9c20a0227aa272827a6ac (patch) | |
| tree | 7b342c70aa021da3fbe3cf522bc73bedbeabbc94 /drivers/pci/controller/dwc/pcie-designware-host.c | |
| parent | 52ded9e4f07b7b608344c5bbef59e31f7b39cb79 (diff) | |
PCI: brcmstb: Accommodate MSI for older chips
Older BrcmSTB chips do not have a separate register for MSI interrupts; the
MSIs are in a register that also contains unrelated interrupts. In
addition, the interrupts lie in bits [31..24] for these legacy chips. This
commit provides common code for both legacy and non-legacy MSI interrupt
registers.
Link: https://lore.kernel.org/r/20200911175232.19016-9-james.quinlan@broadcom.com
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
0 files changed, 0 insertions, 0 deletions