diff options
author | Shmuel Hazan <sh@tkos.co.il> | 2020-06-23 09:03:35 +0300 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-07-14 15:09:16 +0100 |
commit | 216f8e95aacc8e9690d8e2286c472671b65f4128 (patch) | |
tree | 2a85b53238ae205fba124ea3a30ed0f406266d19 /drivers/pci/controller/dwc/pci-meson.c | |
parent | b3a9e3b9622ae10064826dccb4f7a52bd88c7407 (diff) |
PCI: mvebu: Setup BAR0 in order to fix MSI
According to the Armada XP datasheet, section 10.2.6: "in order for
the device to do a write to the MSI doorbell address, it needs to write
to a register in the internal registers space".
As a result of the requirement above, without this patch, MSI won't
function and therefore some devices won't operate properly without
pci=nomsi.
This requirement was not present at the time of writing this driver
since the vendor u-boot always initializes all PCIe controllers
(incl. BAR0 initialization) and for some time, the vendor u-boot was
the only available bootloader for this driver's SoCs (e.g. A38x,A37x,
etc).
Tested on an Armada 385 board on mainline u-boot (2020.4), without
u-boot PCI initialization and the following PCIe devices:
- Wilocity Wil6200 rev 2 (wil6210)
- Qualcomm Atheros QCA6174 (ath10k_pci)
Both failed to get a response from the device after loading the
firmware and seem to operate properly with this patch.
Link: https://lore.kernel.org/r/20200623060334.108444-1-sh@tkos.co.il
Signed-off-by: Shmuel Hazan <sh@tkos.co.il>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-meson.c')
0 files changed, 0 insertions, 0 deletions