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| author | Om Prakash Singh <[email protected]> | 2021-06-23 15:35:21 +0530 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2021-08-04 12:28:16 +0100 |
| commit | ceb1412c1c8ca5b28c4252bdb15f2f1f17b4a1b0 (patch) | |
| tree | 134ddce3ad565616cc428061958caed17ebdee6a /drivers/pci/controller/dwc/pci-layerscape.c | |
| parent | e73f0f0ee7541171d89f2e2491130c7771ba58d3 (diff) | |
PCI: tegra194: Fix handling BME_CHGED event
In tegra_pcie_ep_hard_irq(), APPL_INTR_STATUS_L0 is stored in val and again
APPL_INTR_STATUS_L1_0_0 is also stored in val. So when execution reaches
"if (val & APPL_INTR_STATUS_L0_PCI_CMD_EN_INT)", val is not correct.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Om Prakash Singh <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Bjorn Helgaas <[email protected]>
Acked-by: Vidya Sagar <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-layerscape.c')
0 files changed, 0 insertions, 0 deletions