PCI: keembay: Add support for Intel Keem Bay

Add driver for Intel Keem Bay SoC PCIe controller. This controller
is based on DesignWare PCIe core.

In Root Complex mode, only internal reference clock is possible for
Keem Bay A0. For Keem Bay B0, external reference clock can be used
and will be the default configuration. Currently, keembay_pcie_of_data
structure has one member. It will be expanded later to handle this
difference.

Endpoint mode link initialization is handled by the boot firmware.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Wan Ahmad Zainie <[email protected]>
Signed-off-by: Srikanth Thokala <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Andy Shevchenko <[email protected]>

0 files changed, 0 insertions, 0 deletions