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| author | Dave Airlie <airlied@redhat.com> | 2023-08-24 07:26:06 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2023-08-24 07:26:06 +1000 |
| commit | fdebffeba8b877368ddcc139c26278c1c97931a4 (patch) | |
| tree | 5ebf85a3e26d55ea388aa7a8608222205a4d59ba /drivers/net/phy/marvell10g.c | |
| parent | cacaeb27ade4b793c456179bb6eda4592d206cd8 (diff) | |
| parent | 706a741595047797872e669b3101429ab8d378ef (diff) | |
BackMerge tag 'v6.5-rc7' into drm-next
Linux 6.5-rc7
This is needed for the CI stuff and the msm pull has fixes in it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/net/phy/marvell10g.c')
| -rw-r--r-- | drivers/net/phy/marvell10g.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 55d9d7acc32e..d4bb90d76881 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -328,6 +328,13 @@ static int mv3310_power_up(struct phy_device *phydev) ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL, MV_V2_PORT_CTRL_PWRDOWN); + /* Sometimes, the power down bit doesn't clear immediately, and + * a read of this register causes the bit not to clear. Delay + * 100us to allow the PHY to come out of power down mode before + * the next access. + */ + udelay(100); + if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 || priv->firmware_ver < 0x00030000) return ret; |