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authorSasha Neftin <sasha.neftin@intel.com>2021-06-24 11:18:46 +0300
committerTony Nguyen <anthony.l.nguyen@intel.com>2021-07-20 16:11:36 -0700
commitef407b86d3cc7ab7ad37658c1c7a094cb8f3b6b4 (patch)
treefb451d854474c4fcedb2cfdb0817a2ebe10da891 /drivers/net/ethernet/intel/igc/igc_phy.c
parent3e55d231716ea361b1520b801c6778c4c48de102 (diff)
e1000e: Add polling mechanism to indicate CSME DPG exit
Per guidance from the CSME architecture team, it may take up to 1 second for unconfiguring dynamic power gating mode. Practically it can take more time. Wait up to 2.5 seconds to indicate dynamic power gating exit from the S0ix configuration. Detect scenarios that take more than 1 second but less than 2.5 seconds will emit warning message. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_phy.c')
0 files changed, 0 insertions, 0 deletions