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authorThomas Zimmermann <[email protected]>2023-01-31 14:18:33 +0100
committerThomas Zimmermann <[email protected]>2023-01-31 14:18:33 +0100
commitdf5bf3b942a8d344bd9cbbe6ac31c9a2ea1557a4 (patch)
treebfbcbe56b9f4f8b1e44242b80800a68b2ae5b2d6 /drivers/net/ethernet/intel/igc/igc_defines.h
parent532a38292c7213aa6d950e6a1b86659d08b5aa67 (diff)
parentaebd8f0c6f8280ba35bc989f4a9ea47469d3589a (diff)
Merge drm/drm-next into drm-misc-next
Backmerging to get v6.2-rc6. Signed-off-by: Thomas Zimmermann <[email protected]>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_defines.h')
-rw-r--r--drivers/net/ethernet/intel/igc/igc_defines.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h
index a7b22639cfcd..e9747ec5ac0b 100644
--- a/drivers/net/ethernet/intel/igc/igc_defines.h
+++ b/drivers/net/ethernet/intel/igc/igc_defines.h
@@ -475,7 +475,9 @@
#define IGC_TSAUXC_EN_TT0 BIT(0) /* Enable target time 0. */
#define IGC_TSAUXC_EN_TT1 BIT(1) /* Enable target time 1. */
#define IGC_TSAUXC_EN_CLK0 BIT(2) /* Enable Configurable Frequency Clock 0. */
+#define IGC_TSAUXC_ST0 BIT(4) /* Start Clock 0 Toggle on Target Time 0. */
#define IGC_TSAUXC_EN_CLK1 BIT(5) /* Enable Configurable Frequency Clock 1. */
+#define IGC_TSAUXC_ST1 BIT(7) /* Start Clock 1 Toggle on Target Time 1. */
#define IGC_TSAUXC_EN_TS0 BIT(8) /* Enable hardware timestamp 0. */
#define IGC_TSAUXC_AUTT0 BIT(9) /* Auxiliary Timestamp Taken. */
#define IGC_TSAUXC_EN_TS1 BIT(10) /* Enable hardware timestamp 0. */