diff options
| author | Hou Tao <houtao1@huawei.com> | 2022-02-17 15:22:30 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-02-22 21:25:48 +0000 |
| commit | fa1114d9eba5087ba5e81aab4c56f546995e6cd3 (patch) | |
| tree | 3c28b1a2af95190120e8ad71dce9d8147c8f6602 /drivers/net/ethernet/broadcom/bnxt/bnxt.h | |
| parent | 97e58e395e9c074fd096dad13c54e9f4112cf71d (diff) | |
arm64: insn: add encoders for atomic operations
It is a preparation patch for eBPF atomic supports under arm64. eBPF
needs support atomic[64]_fetch_add, atomic[64]_[fetch_]{and,or,xor} and
atomic[64]_{xchg|cmpxchg}. The ordering semantics of eBPF atomics are
the same with the implementations in linux kernel.
Add three helpers to support LDCLR/LDEOR/LDSET/SWP, CAS and DMB
instructions. STADD/STCLR/STEOR/STSET are simply encoded as aliases for
LDADD/LDCLR/LDEOR/LDSET with XZR as the destination register, so no extra
helper is added. atomic_fetch_add() and other atomic ops needs support for
STLXR instruction, so extend enum aarch64_insn_ldst_type to do that.
LDADD/LDEOR/LDSET/SWP and CAS instructions are only available when LSE
atomics is enabled, so just return AARCH64_BREAK_FAULT directly in
these newly-added helpers if CONFIG_ARM64_LSE_ATOMICS is disabled.
Signed-off-by: Hou Tao <houtao1@huawei.com>
Link: https://lore.kernel.org/r/20220217072232.1186625-3-houtao1@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/broadcom/bnxt/bnxt.h')
0 files changed, 0 insertions, 0 deletions