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authorVladimir Oltean <vladimir.oltean@nxp.com>2019-11-09 15:03:01 +0200
committerDavid S. Miller <davem@davemloft.net>2019-11-11 12:59:10 -0800
commitc9d2203bcb813805cd74abe17e9a4c811fc0bf02 (patch)
tree9cc7819724695019b9f5d8c576d92c68ef5b62ad /drivers/net/ethernet/amd/mvme147.c
parent21468199016f4e4983c7c22368d1cfba3914facb (diff)
net: mscc: ocelot: don't hardcode the number of the CPU port
VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the queuing subsystem for terminating traffic locally). There are 2 issues with hardcoding the CPU port as #10: - It is not clear which snippets of the code are configuring something for one of the CPU ports, and which snippets are just doing something related to the number of physical ports. - Actually any physical port can act as a CPU port connected to an external CPU (in addition to the local CPU). This is called NPI mode (Node Processor Interface) and is the way that the 6-port VSC9959 (Felix) switch is integrated inside NXP LS1028A (the "local management CPU" functionality is not used there). This patch makes it clear that the ocelot_bridge_stp_state_set function operates on the CPU port (by making it an implicit member of the bridging domain), and at the same time adds logic for the NPI port (aka a physical port) to play the role of a CPU port (it shouldn't be part of bridge_fwd_mask, as it's not explicitly enslaved to a bridge). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/amd/mvme147.c')
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