diff options
author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2021-05-21 00:16:57 +0300 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2021-05-21 13:23:29 -0700 |
commit | 718bad0e4da9a637a99c13b27dcb030921961bc7 (patch) | |
tree | 9c0e2f99b47c954cae43fb631eef5798b6c08f68 /drivers/net/dsa/sja1105/sja1105_spi.c | |
parent | ca021f0dd85140bc96f1381700bbcab753b74658 (diff) |
net: dsa: sja1105: adapt to a SPI controller with a limited max transfer size
The static config of the sja1105 switch is a long stream of bytes which
is programmed to the hardware in chunks (portions with the chip select
continuously asserted) of max 256 bytes each. Each chunk is a
spi_message composed of 2 spi_transfers: the buffer with the data and a
preceding buffer with the SPI access header.
Only that certain SPI controllers, such as the spi-sc18is602 I2C-to-SPI
bridge, cannot keep the chip select asserted for that long.
The spi_max_transfer_size() and spi_max_message_size() functions are how
the controller can impose its hardware limitations upon the SPI
peripheral driver.
For the sja1105 driver to work with these controllers, both buffers must
be smaller than the transfer limit, and their sum must be smaller than
the message limit.
Regression-tested on a switch connected to a controller with no
limitations (spi-fsl-dspi) as well as with one with caps for both
max_transfer_size and max_message_size (spi-sc18is602).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/sja1105/sja1105_spi.c')
-rw-r--r-- | drivers/net/dsa/sja1105/sja1105_spi.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/net/dsa/sja1105/sja1105_spi.c b/drivers/net/dsa/sja1105/sja1105_spi.c index 8746e3f158a0..5a7b404bf3ce 100644 --- a/drivers/net/dsa/sja1105/sja1105_spi.c +++ b/drivers/net/dsa/sja1105/sja1105_spi.c @@ -8,8 +8,6 @@ #include "sja1105.h" #define SJA1105_SIZE_RESET_CMD 4 -#define SJA1105_SIZE_SPI_MSG_HEADER 4 -#define SJA1105_SIZE_SPI_MSG_MAXLEN (64 * 4) struct sja1105_chunk { u8 *buf; @@ -40,19 +38,19 @@ static int sja1105_xfer(const struct sja1105_private *priv, size_t len, struct ptp_system_timestamp *ptp_sts) { u8 hdr_buf[SJA1105_SIZE_SPI_MSG_HEADER] = {0}; - struct sja1105_chunk chunk = { - .len = min_t(size_t, len, SJA1105_SIZE_SPI_MSG_MAXLEN), - .reg_addr = reg_addr, - .buf = buf, - }; struct spi_device *spi = priv->spidev; struct spi_transfer xfers[2] = {0}; struct spi_transfer *chunk_xfer; struct spi_transfer *hdr_xfer; + struct sja1105_chunk chunk; int num_chunks; int rc, i = 0; - num_chunks = DIV_ROUND_UP(len, SJA1105_SIZE_SPI_MSG_MAXLEN); + num_chunks = DIV_ROUND_UP(len, priv->max_xfer_len); + + chunk.reg_addr = reg_addr; + chunk.buf = buf; + chunk.len = min_t(size_t, len, priv->max_xfer_len); hdr_xfer = &xfers[0]; chunk_xfer = &xfers[1]; @@ -104,7 +102,7 @@ static int sja1105_xfer(const struct sja1105_private *priv, chunk.buf += chunk.len; chunk.reg_addr += chunk.len / 4; chunk.len = min_t(size_t, (ptrdiff_t)(buf + len - chunk.buf), - SJA1105_SIZE_SPI_MSG_MAXLEN); + priv->max_xfer_len); rc = spi_sync_transfer(spi, xfers, 2); if (rc < 0) { |