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authorAaro Koskinen <[email protected]>2009-05-27 17:54:45 +0300
committerBen Dooks <[email protected]>2009-06-13 10:39:25 +0100
commitbaf46b4e378d7950dff7ba30cfd50ff585987cb4 (patch)
tree571bd77cb953d1fc6a206c250b3cf8dd4718546f /drivers/mtd/lpddr/lpddr_cmds.c
parente0cd2dd5dd2b7c6512e46ce0b4f119cd7b0c74a4 (diff)
i2c: OMAP2/3: Fix scll/sclh calculations
Fix scll/sclh calculations for HS and fast modes. Currently the driver uses equal (roughly) low/high times which will result in too short low time. OMAP3430 TRM gives the following equations: F/S: tLow = (scll + 7) * internal_clk tHigh = (sclh + 5) * internal_clk HS: tLow = (scll + 7) * fclk tHigh = (sclh + 5) * fclk Furthermore, the I2C specification sets the following minimum values for HS tLow/tHigh for capacitive bus loads 100 pF (maximum speed 3400) and 400 pF (maximum speed 1700): speed tLow tHigh 3400 160 ns 60 ns 1700 320 ns 120 ns and for F/S: speed tLow tHigh 400 1300 ns 600 ns 100 4700 ns 4000 ns By using duty cycles 33/66 (HS, F) and 50/50 (S) we stay above these minimum values. Signed-off-by: Aaro Koskinen <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Ben Dooks <[email protected]>
Diffstat (limited to 'drivers/mtd/lpddr/lpddr_cmds.c')
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