diff options
author | Shaohua Li <[email protected]> | 2011-03-16 11:37:29 +0800 |
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committer | Ingo Molnar <[email protected]> | 2011-03-18 11:44:01 +0100 |
commit | 4981d01eada5354d81c8929d5b2836829ba3df7b (patch) | |
tree | 3f1e39b63111e06e2c213c6a0b1c5176e81a4ff9 /drivers/mtd/lpddr/lpddr_cmds.c | |
parent | e8e999cf3cc733482e390b02ff25a64cecdc0b64 (diff) |
x86: Flush TLB if PGD entry is changed in i386 PAE mode
According to intel CPU manual, every time PGD entry is changed in i386 PAE
mode, we need do a full TLB flush. Current code follows this and there is
comment for this too in the code.
But current code misses the multi-threaded case. A changed page table
might be used by several CPUs, every such CPU should flush TLB. Usually
this isn't a problem, because we prepopulate all PGD entries at process
fork. But when the process does munmap and follows new mmap, this issue
will be triggered.
When it happens, some CPUs keep doing page faults:
http://marc.info/?l=linux-kernel&m=129915020508238&w=2
Reported-by: Yasunori Goto<[email protected]>
Tested-by: Yasunori Goto<[email protected]>
Reviewed-by: Rik van Riel <[email protected]>
Signed-off-by: Shaohua Li<[email protected]>
Cc: Mallick Asit K <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: linux-mm <[email protected]>
Cc: stable <[email protected]>
LKML-Reference: <1300246649.2337.95.camel@sli10-conroe>
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'drivers/mtd/lpddr/lpddr_cmds.c')
0 files changed, 0 insertions, 0 deletions