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author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-12 13:57:33 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-12 13:57:33 -0800 |
commit | 20077583ccdd4db8aa626eae442e030d217901db (patch) | |
tree | 56b3a55134f9398ddc8865784e1b80ca5966f211 /drivers/mmc/core/mmc.c | |
parent | 0c4b09cb542fd0c4134e3f87442c89abffbfeedd (diff) | |
parent | 5d40213347480e3ab903d5438dbd0d6b0110e6b8 (diff) |
Merge tag 'mmc-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Don't force a retune before eMMC RPMB switch
- Add optional HS400 tuning in HS400es initialization
- Add a sysfs node to for write-protect-group-size
- Add re-tuning test to the mmc-test module
- Use mrq.sbc to support close-ended ioctl requests
MMC host:
- mmci: Add support for SDIO in-band irqs for the stm32 variant
- mmc_spi: Remove broken support custom DMA mapped buffers
- mtk-sd: Improve and extend the support for tunings
- renesas_sdhi: Document support for the RZ/Five variant
- sdhci_am654: Drop support for the ti,otap-del-sel DT property
- sdhci-brcmstb: Add support for the brcm 74165b0 variant
- sdhci-msm: Add compatibles for IPQ4019 and IPQ8074
- sdhci-of-dwcmshc: Add support for the T-Head TH1520 variant
- sdhci-xenon: Add support for the Marvell ac5 variant"
* tag 'mmc-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (27 commits)
mmc: xenon: Add ac5 support via bounce buffer
dt-bindings: mmc: add Marvell ac5
mmc: sdhci-brcmstb: add new sdhci reset sequence for brcm 74165b0
dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 74165b0
mmc: core: Do not force a retune before RPMB switch
mmc: core: Add HS400 tuning in HS400es initialization
mmc: sdhci_omap: Fix TI SoC dependencies
mmc: sdhci_am654: Fix TI SoC dependencies
mmc: core: Add wp_grp_size sysfs node
mmc: mmc_test: Add re-tuning test
mmc: mmc_spi: remove custom DMA mapped buffers
dt-bindings: mmc: sdhci-msm: document dedicated IPQ4019 and IPQ8074
dt-bindings: mmc: synopsys-dw-mshc: add iommus for Intel SocFPGA
mmc: mtk-sd: Extend number of tuning steps
dt-bindings: mmc: mtk-sd: add tuning steps related property
mmc: sdhci-omap: don't misuse kernel-doc marker
mmc: mtk-sd: Increase the verbosity of msdc_track_cmd_data
mmc: core: Use mrq.sbc in close-ended ffu
mmc: sdhci_am654: Drop lookup for deprecated ti,otap-del-sel
mmc: sdhci-of-dwcmshc: Use logical OR instead of bitwise OR in dwcmshc_probe()
...
Diffstat (limited to 'drivers/mmc/core/mmc.c')
-rw-r--r-- | drivers/mmc/core/mmc.c | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 705942edacc6..f410bee50132 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -136,6 +136,17 @@ static void mmc_set_erase_size(struct mmc_card *card) mmc_init_erase(card); } + +static void mmc_set_wp_grp_size(struct mmc_card *card) +{ + if (card->ext_csd.erase_group_def & 1) + card->wp_grp_size = card->ext_csd.hc_erase_size * + card->ext_csd.raw_hc_erase_gap_size; + else + card->wp_grp_size = card->csd.erase_size * + (card->csd.wp_grp_size + 1); +} + /* * Given a 128-bit response, decode to our card CSD structure. */ @@ -186,6 +197,7 @@ static int mmc_decode_csd(struct mmc_card *card) b = UNSTUFF_BITS(resp, 37, 5); csd->erase_size = (a + 1) * (b + 1); csd->erase_size <<= csd->write_blkbits - 9; + csd->wp_grp_size = UNSTUFF_BITS(resp, 32, 5); } return 0; @@ -613,11 +625,6 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd) } else { card->ext_csd.data_tag_unit_size = 0; } - - card->ext_csd.max_packed_writes = - ext_csd[EXT_CSD_MAX_PACKED_WRITES]; - card->ext_csd.max_packed_reads = - ext_csd[EXT_CSD_MAX_PACKED_READS]; } else { card->ext_csd.data_sector_size = 512; } @@ -790,6 +797,7 @@ MMC_DEV_ATTR(csd, "%08x%08x%08x%08x\n", card->raw_csd[0], card->raw_csd[1], MMC_DEV_ATTR(date, "%02d/%04d\n", card->cid.month, card->cid.year); MMC_DEV_ATTR(erase_size, "%u\n", card->erase_size << 9); MMC_DEV_ATTR(preferred_erase_size, "%u\n", card->pref_erase << 9); +MMC_DEV_ATTR(wp_grp_size, "%u\n", card->wp_grp_size << 9); MMC_DEV_ATTR(ffu_capable, "%d\n", card->ext_csd.ffu_capable); MMC_DEV_ATTR(hwrev, "0x%x\n", card->cid.hwrev); MMC_DEV_ATTR(manfid, "0x%06x\n", card->cid.manfid); @@ -850,6 +858,7 @@ static struct attribute *mmc_std_attrs[] = { &dev_attr_date.attr, &dev_attr_erase_size.attr, &dev_attr_preferred_erase_size.attr, + &dev_attr_wp_grp_size.attr, &dev_attr_fwrev.attr, &dev_attr_ffu_capable.attr, &dev_attr_hwrev.attr, @@ -1764,7 +1773,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, mmc_set_erase_size(card); } } - + mmc_set_wp_grp_size(card); /* * Ensure eMMC user default partition is enabled */ @@ -1822,8 +1831,13 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, if (err) goto free_card; - - } else if (!mmc_card_hs400es(card)) { + } else if (mmc_card_hs400es(card)) { + if (host->ops->execute_hs400_tuning) { + err = host->ops->execute_hs400_tuning(host, card); + if (err) + goto free_card; + } + } else { /* Select the desired bus width optionally */ err = mmc_select_bus_width(card); if (err > 0 && mmc_card_hs(card)) { |