diff options
| author | Jason Gunthorpe <jgg@nvidia.com> | 2024-08-29 21:06:23 -0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2024-09-04 11:39:03 +0200 |
| commit | 2910a7fa1be090fc7637cef0b2e70bcd15bf5469 (patch) | |
| tree | 8a8e2fde1ae893d3f6ae78db5c79c6f5e632e649 /drivers/iommu/amd/io_pgtable_v2.c | |
| parent | 7e515866299d1d01db6c2bbbc8045218c099ba1f (diff) | |
iommu/amd: Do not set the D bit on AMD v2 table entries
The manual says that bit 6 is IGN for all Page-Table Base Address
pointers, don't set it.
Fixes: aaac38f61487 ("iommu/amd: Initial support for AMD IOMMU v2 page table")
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/14-v2-831cdc4d00f3+1a315-amd_iopgtbl_jgg@nvidia.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd/io_pgtable_v2.c')
| -rw-r--r-- | drivers/iommu/amd/io_pgtable_v2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/amd/io_pgtable_v2.c b/drivers/iommu/amd/io_pgtable_v2.c index 77cc1b4a3f02..25b9042fa453 100644 --- a/drivers/iommu/amd/io_pgtable_v2.c +++ b/drivers/iommu/amd/io_pgtable_v2.c @@ -51,7 +51,7 @@ static inline u64 set_pgtable_attr(u64 *page) u64 prot; prot = IOMMU_PAGE_PRESENT | IOMMU_PAGE_RW | IOMMU_PAGE_USER; - prot |= IOMMU_PAGE_ACCESS | IOMMU_PAGE_DIRTY; + prot |= IOMMU_PAGE_ACCESS; return (iommu_virt_to_phys(page) | prot); } |