diff options
author | Devesh Sharma <Devesh.Sharma@Emulex.Com> | 2014-02-04 11:57:10 +0530 |
---|---|---|
committer | Roland Dreier <roland@purestorage.com> | 2014-04-03 08:30:06 -0700 |
commit | fad51b7d361b4f1b439aa10fa258a35dac62b297 (patch) | |
tree | df3dc67d74ba56ec36cbe254e178adb8debd0749 /drivers/infiniband/hw/ocrdma/ocrdma_sli.h | |
parent | 334b8db3a6c57bec78bcaacef3b1658bfc6e2efe (diff) |
RDMA/ocrdma: Code clean-up
Clean up code. Also modifying GSI QP to error during ocrdma_close is fixed.
Signed-off-by: Devesh Sharma <devesh.sharma@emulex.com>
Signed-off-by: Selvin Xavier <selvin.xavier@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/ocrdma/ocrdma_sli.h')
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma_sli.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h index 6e048b7283c4..96c9ee602ba4 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h +++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h @@ -152,11 +152,10 @@ enum { #define OCRDMA_MIN_Q_PAGE_SIZE (4096) #define OCRDMA_MAX_Q_PAGES (8) -#define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C -#define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF -#define OCRDMA_SLI_ASIC_GEN_NUM_MASK 0x0000FF00 -#define OCRDMA_SLI_ASIC_GEN_NUM_SHIFT 0x08 - +#define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C +#define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF +#define OCRDMA_SLI_ASIC_GEN_NUM_MASK 0x0000FF00 +#define OCRDMA_SLI_ASIC_GEN_NUM_SHIFT 0x08 /* # 0: 4K Bytes # 1: 8K Bytes @@ -633,7 +632,7 @@ enum { enum { OCRDMA_CREATE_CQ_VER2 = 2, - OCRDMA_CREATE_CQ_VER3 = 3, + OCRDMA_CREATE_CQ_VER3 = 3, OCRDMA_CREATE_CQ_PAGE_CNT_MASK = 0xFFFF, OCRDMA_CREATE_CQ_PAGE_SIZE_SHIFT = 16, @@ -1093,6 +1092,7 @@ enum { OCRDMA_MODIFY_QP_RSP_MAX_ORD_MASK = 0xFFFF << OCRDMA_MODIFY_QP_RSP_MAX_ORD_SHIFT }; + struct ocrdma_modify_qp_rsp { struct ocrdma_mqe_hdr hdr; struct ocrdma_mbx_rsp rsp; @@ -1105,8 +1105,8 @@ struct ocrdma_query_qp { struct ocrdma_mqe_hdr hdr; struct ocrdma_mbx_hdr req; -#define OCRDMA_QUERY_UP_QP_ID_SHIFT 0 -#define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF +#define OCRDMA_QUERY_UP_QP_ID_SHIFT 0 +#define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF u32 qp_id; }; |