diff options
author | Ard Biesheuvel <ardb@kernel.org> | 2020-02-18 16:50:54 +0100 |
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committer | Ard Biesheuvel <ardb@kernel.org> | 2020-02-27 11:15:35 +0100 |
commit | e114412f616446708b3d1e559ff4af9db7ade46e (patch) | |
tree | 2a0b4e63c0e999f967eb96f3198c926816c7a996 /drivers/iio/trigger/stm32-timer-trigger.c | |
parent | 184bf653a7a452c18b29136e6ef59972af288c7e (diff) |
ARM: decompressor: prepare cache_clean_flush for doing by-VA maintenance
In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.
Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Diffstat (limited to 'drivers/iio/trigger/stm32-timer-trigger.c')
0 files changed, 0 insertions, 0 deletions