diff options
| author | Tony Lindgren <[email protected]> | 2017-11-28 07:06:34 -0800 |
|---|---|---|
| committer | Tony Lindgren <[email protected]> | 2017-11-28 07:06:34 -0800 |
| commit | 2db57789e6612ce0cf2fcbb577a1c8307b708566 (patch) | |
| tree | dd9f9e3dffabbf5cb932fcf5055ab329ca940fa0 /drivers/iio/trigger/stm32-timer-trigger.c | |
| parent | f0c96c6d40312b1a76cd36709dc3eb5948c1b97f (diff) | |
| parent | e9a9bb4e4779ca74cb52a6e2f8acbc0881d3bb18 (diff) | |
Merge branch 'soc-fixes' into omap-for-v4.15/fixes
Diffstat (limited to 'drivers/iio/trigger/stm32-timer-trigger.c')
| -rw-r--r-- | drivers/iio/trigger/stm32-timer-trigger.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c index 9b9053494daf..b542dc484969 100644 --- a/drivers/iio/trigger/stm32-timer-trigger.c +++ b/drivers/iio/trigger/stm32-timer-trigger.c @@ -174,6 +174,7 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv) clk_disable(priv->clk); /* Stop timer */ + regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); regmap_write(priv->regmap, TIM_PSC, 0); regmap_write(priv->regmap, TIM_ARR, 0); @@ -354,7 +355,6 @@ static const struct attribute_group *stm32_trigger_attr_groups[] = { }; static const struct iio_trigger_ops timer_trigger_ops = { - .owner = THIS_MODULE, }; static int stm32_setup_iio_triggers(struct stm32_timer_trigger *priv) @@ -492,7 +492,6 @@ static int stm32_counter_validate_trigger(struct iio_dev *indio_dev, } static const struct iio_info stm32_trigger_info = { - .driver_module = THIS_MODULE, .validate_trigger = stm32_counter_validate_trigger, .read_raw = stm32_counter_read_raw, .write_raw = stm32_counter_write_raw @@ -715,8 +714,9 @@ static ssize_t stm32_count_set_preset(struct iio_dev *indio_dev, if (ret) return ret; + /* TIMx_ARR register shouldn't be buffered (ARPE=0) */ + regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); regmap_write(priv->regmap, TIM_ARR, preset); - regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE); return len; } |