diff options
| author | Alexey Kodanev <aleksei.kodanev@bell-sw.com> | 2022-10-04 11:14:02 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-10 17:32:56 -0400 |
| commit | d2bd0831b51d1123fc86c019db3452d6a1ce5029 (patch) | |
| tree | 42bf201070b8cedc378c45256cb0cf6ac4a8a636 /drivers/gpu | |
| parent | 2cc4a5914ce952d6fc83b0f8089a23095ad4f677 (diff) | |
drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels'
Since 'hardwareActivityPerformanceLevels' is set to the size of the
'performance_levels' array in smu7_hwmgr_backend_init(), using the
'<=' assertion to check for the next index value is incorrect.
Replace it with '<'.
Detected using the static analysis tool - Svace.
Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alexey Kodanev <aleksei.kodanev@bell-sw.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c index e4fcbf8a7eb5..7ef7e81525a3 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c @@ -3603,7 +3603,7 @@ static int smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr, return -EINVAL); PP_ASSERT_WITH_CODE( - (smu7_power_state->performance_level_count <= + (smu7_power_state->performance_level_count < hwmgr->platform_descriptor.hardwareActivityPerformanceLevels), "Performance levels exceeds Driver limit!", return -EINVAL); |