diff options
| author | Jani Nikula <[email protected]> | 2024-06-04 18:25:50 +0300 |
|---|---|---|
| committer | Jani Nikula <[email protected]> | 2024-06-07 11:28:49 +0300 |
| commit | c8f1392f4849b4e92ea344da29c86834fd54b2cf (patch) | |
| tree | fcb1426e00735454367b51900fd65217bea5af3c /drivers/gpu | |
| parent | 65313768a4e2da9e0abc104afa6d82ee193b01ed (diff) | |
drm/i915: pass dev_priv explicitly to CHV_CANVAS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CHV_CANVAS register macro.
Reviewed-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/a48c7984a14412ef74af250d5bc2ea9097aa2222.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <[email protected]>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a6d7928fbe37..241121b0b3ff 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2110,7 +2110,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state, if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe), CHV_BLEND_LEGACY); - intel_de_write(dev_priv, CHV_CANVAS(pipe), 0); + intel_de_write(dev_priv, CHV_CANVAS(dev_priv, pipe), 0); } crtc->active = true; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 17422a41a51d..44e3f3bebfee 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2191,7 +2191,7 @@ #define CHV_CANVAS_BLUE_MASK REG_GENMASK(9, 0) #define CHV_BLEND(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A) -#define CHV_CANVAS(pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A) +#define CHV_CANVAS(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A) /* Display/Sprite base address macros */ #define DISP_BASEADDR_MASK (0xfffff000) |