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authorVille Syrjälä <[email protected]>2023-06-06 22:14:51 +0300
committerVille Syrjälä <[email protected]>2023-09-07 15:44:16 +0300
commit088ca02108fcb75ae60a82f031a2f6aea731c818 (patch)
tree41f232e6cdce6404a03aefd5ba739d246dd859b4 /drivers/gpu
parent9055e73e8e6a545e43cbc4fd3c9083eeccd8121a (diff)
drm/i915/dsb: Avoid corrupting the first register write
i915_gem_object_create_internal() does not hand out zeroed memory. Thus we may confuse whatever stale garbage is in there as a previous register write and mistakenly handle the first actual register write as an indexed write. This can end up corrupting the instruction sufficiently well to lose the entire register write. Make sure we've actually emitted a previous instruction before attemting indexed register write merging. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dsb.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index cdb80352b844..3de0d572c511 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -137,6 +137,14 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
const u32 *buf = dsb->cmd_buf;
u32 prev_opcode, prev_reg;
+ /*
+ * Nothing emitted yet? Must check before looking
+ * at the actual data since i915_gem_object_create_internal()
+ * does *not* give you zeroed memory!
+ */
+ if (dsb->free_pos == 0)
+ return false;
+
prev_opcode = buf[dsb->ins_start_offset + 1] >> DSB_OPCODE_SHIFT;
prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;