aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm
diff options
context:
space:
mode:
authorLijo Lazar <lijo.lazar@amd.com>2021-02-04 18:51:32 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-03-23 22:59:13 -0400
commit65ec7c08c17141a7798418e48dd614ca8fe429f1 (patch)
tree09d757af93acb7f0c5c2ee391153f768cba6e48a /drivers/gpu/drm
parent2bb8ac85683d9cb9702721d0df8cbf803d114901 (diff)
drm/amd/pm: Enable user min/max gfxclk on aldebaran
Aldebaran has fine grained DPM for GFXCLK. Instead of a discrete level, user can specify a min/max range of GFXCLK for any profiling/tuning purpose.This option is available only in manual performance level mode. Select "manual" as power_dpm_force_performance_level and specify the min/max range using pp_dpm_sclk sysfs node. User cannot specify a min/max range outside of the default min/max range of the ASIC. If specified outside the range, values will be bound by the default min/max range. Ex: To use gfxclk min = 600MHz and max = 900MHz echo manual > /sys/bus/pci/devices/.../power_dpm_force_performance_level echo min 600 max 900 > /sys/bus/pci/devices/.../pp_dpm_sclk Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 7bf8316b9816..befc117a25ef 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1143,9 +1143,16 @@ static int aldebaran_set_soft_freq_limited_range(struct smu_context *smu,
if (clk_type != SMU_GFXCLK && clk_type != SMU_SCLK)
return -EINVAL;
- if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)
+ if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
+ && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM))
return -EINVAL;
+ if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
+ min_clk = max(min, dpm_context->dpm_tables.gfx_table.min);
+ max_clk = min(max, dpm_context->dpm_tables.gfx_table.max);
+ return smu_v13_0_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk);
+ }
+
if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
if (!max || (max < dpm_context->dpm_tables.gfx_table.min) ||
(max > dpm_context->dpm_tables.gfx_table.max)) {