diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-11-17 09:40:49 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 11:44:39 -0500 |
| commit | 0bc519d20ffa7a450bfa21c644c2de95ae8027dc (patch) | |
| tree | b56dfff2a4620146721a41a14d249bf0022ad050 /drivers/gpu/drm/xe/xe_wopcm.c | |
| parent | 4399e95102edfceb7a7dd7eb72cd27b776e7d38b (diff) | |
drm/xe: Remove GEN[0-9]*_ prefixes
After noticing in logs there were still mentions to GEN6 registers, it
was clear commit d9b79ad275e7 ("drm/xe: Drop gen afixes from registers")
didn't take care of all the afixes. Some were added later, but there are
also constants and strings still using that. Continue the cleanup
removing the remaining ones.
To keep it consistent with code nearby, a few other changes are made:
- Remove prefix in INTEL_LEGACY_64B_CONTEXT
- Remove GEN8_CTX_L3LLC_COHERENT since it's unused
- Rename GEN9_FREQ_SCALER to GT_FREQUENCY_SCALER
v2: Use XELP_ as prefix for NUM_MOCS_ENTRIES and remove changes to
MOCS_ENTRIES as this is now done as part of a previous commit
(Matt Roper)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231117174049.527192-3-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_wopcm.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_wopcm.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/drm/xe/xe_wopcm.c b/drivers/gpu/drm/xe/xe_wopcm.c index bf85d4fa56cc..d3a99157e523 100644 --- a/drivers/gpu/drm/xe/xe_wopcm.c +++ b/drivers/gpu/drm/xe/xe_wopcm.c @@ -51,9 +51,10 @@ #define DGFX_WOPCM_SIZE SZ_4M /* FIXME: Larger size require for MTL, do a proper probe sooner or later */ #define MTL_WOPCM_SIZE SZ_4M -#define GEN11_WOPCM_SIZE SZ_2M +#define WOPCM_SIZE SZ_2M + +#define MAX_WOPCM_SIZE SZ_8M -#define GEN12_MAX_WOPCM_SIZE SZ_8M /* 16KB WOPCM (RSVD WOPCM) is reserved from HuC firmware top. */ #define WOPCM_RESERVED_SIZE SZ_16K @@ -65,8 +66,8 @@ /* GuC WOPCM Offset value needs to be aligned to 16KB. */ #define GUC_WOPCM_OFFSET_ALIGNMENT (1UL << GUC_WOPCM_OFFSET_SHIFT) -/* 36KB WOPCM reserved at the end of WOPCM on GEN11. */ -#define GEN11_WOPCM_HW_CTX_RESERVED (SZ_32K + SZ_4K) +/* 36KB WOPCM reserved at the end of WOPCM */ +#define WOPCM_HW_CTX_RESERVED (SZ_32K + SZ_4K) static inline struct xe_gt *wopcm_to_gt(struct xe_wopcm *wopcm) { @@ -80,7 +81,7 @@ static inline struct xe_device *wopcm_to_xe(struct xe_wopcm *wopcm) static u32 context_reserved_size(void) { - return GEN11_WOPCM_HW_CTX_RESERVED; + return WOPCM_HW_CTX_RESERVED; } static bool __check_layout(struct xe_device *xe, u32 wopcm_size, @@ -180,7 +181,7 @@ u32 xe_wopcm_size(struct xe_device *xe) { return IS_DGFX(xe) ? DGFX_WOPCM_SIZE : xe->info.platform == XE_METEORLAKE ? MTL_WOPCM_SIZE : - GEN11_WOPCM_SIZE; + WOPCM_SIZE; } /** @@ -225,7 +226,7 @@ int xe_wopcm_init(struct xe_wopcm *wopcm) * BIOS/IFWI, check against the max allowed wopcm size to * validate if the programmed values align to the wopcm layout. */ - wopcm->size = GEN12_MAX_WOPCM_SIZE; + wopcm->size = MAX_WOPCM_SIZE; goto check; } |