diff options
author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-05-08 15:53:19 -0700 |
---|---|---|
committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:33:49 -0500 |
commit | ce8bf5bd059542431230eac216693a579dc09dba (patch) | |
tree | b6841c93b343466920343f999046fb596aa50e30 /drivers/gpu/drm/xe/xe_mmio.h | |
parent | 34f89ac8e66cd5121fb05c765acc3c67ddbef7a0 (diff) |
drm/xe/mmio: Use struct xe_reg
Convert all the callers to deal with xe_mmio_*() using struct xe_reg
instead of plain u32. In a few places there was also a rename
s/reg/reg_val/ when dealing with the value returned so it doesn't get
mixed up with the register address.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20230508225322.2692066-2-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_mmio.h')
-rw-r--r-- | drivers/gpu/drm/xe/xe_mmio.h | 57 |
1 files changed, 30 insertions, 27 deletions
diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h index b72a0a75259f..f9a23b4ef77d 100644 --- a/drivers/gpu/drm/xe/xe_mmio.h +++ b/drivers/gpu/drm/xe/xe_mmio.h @@ -9,6 +9,7 @@ #include <linux/delay.h> #include <linux/io-64-nonatomic-lo-hi.h> +#include "regs/xe_reg_defs.h" #include "xe_gt_types.h" struct drm_device; @@ -17,33 +18,33 @@ struct xe_device; int xe_mmio_init(struct xe_device *xe); -static inline u8 xe_mmio_read8(struct xe_gt *gt, u32 reg) +static inline u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg) { - if (reg < gt->mmio.adj_limit) - reg += gt->mmio.adj_offset; + if (reg.reg < gt->mmio.adj_limit) + reg.reg += gt->mmio.adj_offset; - return readb(gt->mmio.regs + reg); + return readb(gt->mmio.regs + reg.reg); } static inline void xe_mmio_write32(struct xe_gt *gt, - u32 reg, u32 val) + struct xe_reg reg, u32 val) { - if (reg < gt->mmio.adj_limit) - reg += gt->mmio.adj_offset; + if (reg.reg < gt->mmio.adj_limit) + reg.reg += gt->mmio.adj_offset; - writel(val, gt->mmio.regs + reg); + writel(val, gt->mmio.regs + reg.reg); } -static inline u32 xe_mmio_read32(struct xe_gt *gt, u32 reg) +static inline u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg) { - if (reg < gt->mmio.adj_limit) - reg += gt->mmio.adj_offset; + if (reg.reg < gt->mmio.adj_limit) + reg.reg += gt->mmio.adj_offset; - return readl(gt->mmio.regs + reg); + return readl(gt->mmio.regs + reg.reg); } -static inline u32 xe_mmio_rmw32(struct xe_gt *gt, u32 reg, u32 clr, - u32 set) +static inline u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, + u32 set) { u32 old, reg_val; @@ -55,24 +56,24 @@ static inline u32 xe_mmio_rmw32(struct xe_gt *gt, u32 reg, u32 clr, } static inline void xe_mmio_write64(struct xe_gt *gt, - u32 reg, u64 val) + struct xe_reg reg, u64 val) { - if (reg < gt->mmio.adj_limit) - reg += gt->mmio.adj_offset; + if (reg.reg < gt->mmio.adj_limit) + reg.reg += gt->mmio.adj_offset; - writeq(val, gt->mmio.regs + reg); + writeq(val, gt->mmio.regs + reg.reg); } -static inline u64 xe_mmio_read64(struct xe_gt *gt, u32 reg) +static inline u64 xe_mmio_read64(struct xe_gt *gt, struct xe_reg reg) { - if (reg < gt->mmio.adj_limit) - reg += gt->mmio.adj_offset; + if (reg.reg < gt->mmio.adj_limit) + reg.reg += gt->mmio.adj_offset; - return readq(gt->mmio.regs + reg); + return readq(gt->mmio.regs + reg.reg); } static inline int xe_mmio_write32_and_verify(struct xe_gt *gt, - u32 reg, u32 val, + struct xe_reg reg, u32 val, u32 mask, u32 eval) { u32 reg_val; @@ -83,8 +84,9 @@ static inline int xe_mmio_write32_and_verify(struct xe_gt *gt, return (reg_val & mask) != eval ? -EINVAL : 0; } -static inline int xe_mmio_wait32(struct xe_gt *gt, u32 reg, u32 val, u32 mask, - u32 timeout_us, u32 *out_val, bool atomic) +static inline int xe_mmio_wait32(struct xe_gt *gt, struct xe_reg reg, u32 val, + u32 mask, u32 timeout_us, u32 *out_val, + bool atomic) { ktime_t cur = ktime_get_raw(); const ktime_t end = ktime_add_us(cur, timeout_us); @@ -122,9 +124,10 @@ static inline int xe_mmio_wait32(struct xe_gt *gt, u32 reg, u32 val, u32 mask, int xe_mmio_ioctl(struct drm_device *dev, void *data, struct drm_file *file); -static inline bool xe_mmio_in_range(const struct xe_mmio_range *range, u32 reg) +static inline bool xe_mmio_in_range(const struct xe_mmio_range *range, + struct xe_reg reg) { - return range && reg >= range->start && reg <= range->end; + return range && reg.reg >= range->start && reg.reg <= range->end; } int xe_mmio_probe_vram(struct xe_device *xe); |