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authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>2024-02-13 18:21:35 -0800
committerDave Hansen <dave.hansen@linux.intel.com>2024-02-19 16:31:33 -0800
commitbaf8361e54550a48a7087b603313ad013cc13386 (patch)
tree195fcd0083ac4e7624b03e332cef2ab9775411c6 /drivers/gpu/drm/meson/meson_encoder_dsi.c
parentb401b621758e46812da61fa58a67c3fd8d91de0d (diff)
x86/bugs: Add asm helpers for executing VERW
MDS mitigation requires clearing the CPU buffers before returning to user. This needs to be done late in the exit-to-user path. Current location of VERW leaves a possibility of kernel data ending up in CPU buffers for memory accesses done after VERW such as: 1. Kernel data accessed by an NMI between VERW and return-to-user can remain in CPU buffers since NMI returning to kernel does not execute VERW to clear CPU buffers. 2. Alyssa reported that after VERW is executed, CONFIG_GCC_PLUGIN_STACKLEAK=y scrubs the stack used by a system call. Memory accesses during stack scrubbing can move kernel stack contents into CPU buffers. 3. When caller saved registers are restored after a return from function executing VERW, the kernel stack accesses can remain in CPU buffers(since they occur after VERW). To fix this VERW needs to be moved very late in exit-to-user path. In preparation for moving VERW to entry/exit asm code, create macros that can be used in asm. Also make VERW patching depend on a new feature flag X86_FEATURE_CLEAR_CPU_BUF. Reported-by: Alyssa Milburn <alyssa.milburn@intel.com> Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com> Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://lore.kernel.org/all/20240213-delay-verw-v8-1-a6216d83edb7%40linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/meson/meson_encoder_dsi.c')
0 files changed, 0 insertions, 0 deletions