diff options
| author | Petr Mladek <[email protected]> | 2021-08-30 14:56:06 +0200 |
|---|---|---|
| committer | Petr Mladek <[email protected]> | 2021-08-30 14:56:06 +0200 |
| commit | 71af75b6929458d85f63c0649dc26d6f4c19729e (patch) | |
| tree | c05c57903424d8270f6b6f3ec3493791fdba4e5c /drivers/gpu/drm/imx/imx-ldb.c | |
| parent | fe8e3ee0d588566c1f44f28a555042ef50eba491 (diff) | |
| parent | bc17bed5fd73ef1a9aed39f3b0ea26936dad60b8 (diff) | |
Merge branch 'for-5.15-printk-index' into for-linus
Diffstat (limited to 'drivers/gpu/drm/imx/imx-ldb.c')
| -rw-r--r-- | drivers/gpu/drm/imx/imx-ldb.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index ffdc492c5bc5..53132ddf9587 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c @@ -274,6 +274,11 @@ imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder, "%s: mode exceeds 85 MHz pixel clock\n", __func__); } + if (!IS_ALIGNED(mode->hdisplay, 8)) { + dev_warn(ldb->dev, + "%s: hdisplay does not align to 8 byte\n", __func__); + } + if (dual) { serial_clk = 3500UL * mode->clock; imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk); |