Merge tag 'drm-intel-next-2020-02-25' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

- A backmerge of drm-next solving conflicts on i915/gt/intel_lrc.c
- Clean up shadow batch after I915_EXEC_SECURE
- Drop assertion that active->fence is unchanged

Here goes drm-intel-next-2020-02-25:
- A backmerge of drm-next solving conflicts on i915/gt/intel_lrc.c
- Clean up shadow batch after I915_EXEC_SECURE
- Drop assertion that active->fence is unchanged
drm-intel-next-2020-02-24-1:
- RC6 fixes - Chris
- Add extra slice common debug register - Lionel
- Align virtual engines uabi_class/instance with i915_drm.h - Tvrtko
- Avoid potential division by zero in computing CS timestamp - Chris
- Avoid using various globals - Michal Winiarski, Matt Auld
- Break up long lists of GEM object reclaim - Chris
- Check that the vma hasn't been closed before we insert it - Chris
- Consolidate SDVO HDMI force_dvi handling - Ville
- Conversion to new logging and warn macros and functions - Pankaj, Wambul, Chris
- DC3CO fixes - Jose
- Disable use of hwsp_cacheline for kernel_context - Chris
- Display IRQ pre/post uninstall refactor - Jani
- Display port sync refactor for robustness and fixes - Ville, Manasi
- Do not attempt to reprogram IA/ring frequencies for dgfx - Chris
- Drop alpha_support for good in favor of force_probe - Jani
- DSI ACPI related fixes and refactors - Vivek, Jani, Rajat
- Encoder refactor for flexibility to add more information, especiallly DSI related - Jani, Vandita
- Engine workarounds refactor for robustness around resue - Daniele
- FBC simplification and tracepoints
- Various fixes for build - Jani, Kees Cook, Chris, Zhang Xiaoxu
- Fix cmdparser - Chris
- Fix DRM_I915_GEM_MMAP_OFFFSET - Chris
- Fix i915_request flags - Chris
- Fix inconsistency between pfit enable and scaler freeing - Stanislav
- Fix inverted warn_on on display code - Chris
- Fix modeset locks in sanitize_watermarks - Ville
- Fix OA context id overlap with idle context id - Umesh
- Fix pipe and vblank enable for MST - Jani
- Fix VBT handling for timing parameters - Vandita
- Fixes o kernel doc - Chris, Ville
- Force full modeset whenever DSC is enabled at probe - Jani
- Various GEM locking simplification and fixes - Jani , Chris, Jose
  - Including some changes in preparation for making GEM execbuf parallel - Chris
- Gen11 pcode error codes - Matt Roper
- Gen8+ interrupt handler refactor - Chris
- Many fixes and improvements around GuC code - Daniele, Michal Wajdeczko
- i915 parameters improvements sfor flexible input and better debugability - Chris, Jani
- Ice Lake and Elkhart Lake Fixes and workarounds - Matt Roper, Jose, Vivek, Matt Atwood
- Improvements on execlists, requests and other areas, fixing hangs and also
  improving hang detection, recover and debugability - Chris
  - Also introducing offline GT error capture - Chris
- Introduce encoder->compute_config_late() to help MST - Ville
- Make dbuf configuration const - Jani
- Few misc clean ups - Ville, Chris
- Never allow userptr into the new mapping types - Janusz
- Poison rings after use and GTT scratch pages - Chris
- Protect signaler walk with RCU - Chris
- PSR fixes - Jose
- Pull sseu context updates under gt - Chris
- Read rawclk_freq earlier - Chris
- Refactor around VBT handling to allow geting information through the encoder - Jani
- Refactor l3cc/mocs availability - Chris
- Refactor to use intel_connector over drm_connector - Ville
- Remove i915_energy_uJ from debugfs - Tvrtko
- Remove lite restore defines - Mika Kuoppala
- Remove prefault_disable modparam - Chris
- Many selftests fixes and improvements - Chris
- Set intel_dp_set_m_n() for MST slaves - Jose
- Simplify hot plug pin handling and other fixes around pin and polled modes - Ville
- Skip CPU synchronization on dma-buf attachments - chris
- Skip global serialization of clear_range for bxt vtd - Chris
- Skip rmw for marked register - Chris
- Some other GEM Fixes - Chris
- Some small changes for satisfying static code analysis - Colin, Chris
- Suppress warnings for unused debugging locals
- Tiger Lake enabling, including re-enable -f RPS, workarounds and other display fixes and changes - Chris, Matt Roper, Mika Kuoppala, Anshuman, Jose, Radhakrishna, Rafael.
- Track hw reported context runtime - Tvrtko
- Update bug filling URL - Jani
- Use async bind for PIN_USER into bsw/bxt ggtt - Chris
- Use the kernel_context to measuer the breadcrumb size - Chris
- Userptr fixes and robustness for big pages - Matt Auld
- Various Display refactors and clean-ups, specially around logs and use of drm_i915_private - Jani, Ville
- Various display refactors and fixes, especially around cdclk, modeset, and encoder - Chris, Jani
- Various eDP/DP fixes around DPCD - Lyude
- Various fixes and refactors for better Display watermark handling - Ville, Stanislav
- Various other display refactors - Ville
- Various refactor for better handling of display plane states - Ville
- Wean off drm_pci_alloc/drm_pci_free - Chris
- Correctly terminate connector iteration- Ville
- Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgtt - Chris

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200225185853.GA3282832@intel.com

1 files changed, 203 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index 3ef3620e0da5..2a1d4ba1f9f3 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/prime_numbers.h>
+#include <linux/sort.h>
 
 #include "../i915_selftest.h"
 
@@ -19,6 +20,7 @@
 #include "gem/selftests/mock_context.h"
 #include "gt/intel_engine_user.h"
 #include "gt/intel_gt.h"
+#include "i915_memcpy.h"
 #include "selftests/igt_flush_test.h"
 #include "selftests/i915_random.h"
 
@@ -572,6 +574,195 @@ out_put:
 	return err;
 }
 
+static const char *repr_type(u32 type)
+{
+	switch (type) {
+	case I915_MAP_WB:
+		return "WB";
+	case I915_MAP_WC:
+		return "WC";
+	}
+
+	return "";
+}
+
+static struct drm_i915_gem_object *
+create_region_for_mapping(struct intel_memory_region *mr, u64 size, u32 type,
+			  void **out_addr)
+{
+	struct drm_i915_gem_object *obj;
+	void *addr;
+
+	obj = i915_gem_object_create_region(mr, size, 0);
+	if (IS_ERR(obj))
+		return obj;
+
+	addr = i915_gem_object_pin_map(obj, type);
+	if (IS_ERR(addr)) {
+		i915_gem_object_put(obj);
+		if (PTR_ERR(addr) == -ENXIO)
+			return ERR_PTR(-ENODEV);
+		return addr;
+	}
+
+	*out_addr = addr;
+	return obj;
+}
+
+static int wrap_ktime_compare(const void *A, const void *B)
+{
+	const ktime_t *a = A, *b = B;
+
+	return ktime_compare(*a, *b);
+}
+
+static void igt_memcpy_long(void *dst, const void *src, size_t size)
+{
+	unsigned long *tmp = dst;
+	const unsigned long *s = src;
+
+	size = size / sizeof(unsigned long);
+	while (size--)
+		*tmp++ = *s++;
+}
+
+static inline void igt_memcpy(void *dst, const void *src, size_t size)
+{
+	memcpy(dst, src, size);
+}
+
+static inline void igt_memcpy_from_wc(void *dst, const void *src, size_t size)
+{
+	i915_memcpy_from_wc(dst, src, size);
+}
+
+static int _perf_memcpy(struct intel_memory_region *src_mr,
+			struct intel_memory_region *dst_mr,
+			u64 size, u32 src_type, u32 dst_type)
+{
+	struct drm_i915_private *i915 = src_mr->i915;
+	const struct {
+		const char *name;
+		void (*copy)(void *dst, const void *src, size_t size);
+		bool skip;
+	} tests[] = {
+		{
+			"memcpy",
+			igt_memcpy,
+		},
+		{
+			"memcpy_long",
+			igt_memcpy_long,
+		},
+		{
+			"memcpy_from_wc",
+			igt_memcpy_from_wc,
+			!i915_has_memcpy_from_wc(),
+		},
+	};
+	struct drm_i915_gem_object *src, *dst;
+	void *src_addr, *dst_addr;
+	int ret = 0;
+	int i;
+
+	src = create_region_for_mapping(src_mr, size, src_type, &src_addr);
+	if (IS_ERR(src)) {
+		ret = PTR_ERR(src);
+		goto out;
+	}
+
+	dst = create_region_for_mapping(dst_mr, size, dst_type, &dst_addr);
+	if (IS_ERR(dst)) {
+		ret = PTR_ERR(dst);
+		goto out_unpin_src;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+		ktime_t t[5];
+		int pass;
+
+		if (tests[i].skip)
+			continue;
+
+		for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
+			ktime_t t0, t1;
+
+			t0 = ktime_get();
+
+			tests[i].copy(dst_addr, src_addr, size);
+
+			t1 = ktime_get();
+			t[pass] = ktime_sub(t1, t0);
+		}
+
+		sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
+		pr_info("%s src(%s, %s) -> dst(%s, %s) %14s %4llu KiB copy: %5lld MiB/s\n",
+			__func__,
+			src_mr->name,
+			repr_type(src_type),
+			dst_mr->name,
+			repr_type(dst_type),
+			tests[i].name,
+			size >> 10,
+			div64_u64(mul_u32_u32(4 * size,
+					      1000 * 1000 * 1000),
+				  t[1] + 2 * t[2] + t[3]) >> 20);
+
+		cond_resched();
+	}
+
+	i915_gem_object_unpin_map(dst);
+	i915_gem_object_put(dst);
+out_unpin_src:
+	i915_gem_object_unpin_map(src);
+	i915_gem_object_put(src);
+
+	i915_gem_drain_freed_objects(i915);
+out:
+	if (ret == -ENODEV)
+		ret = 0;
+
+	return ret;
+}
+
+static int perf_memcpy(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	static const u32 types[] = {
+		I915_MAP_WB,
+		I915_MAP_WC,
+	};
+	static const u32 sizes[] = {
+		SZ_4K,
+		SZ_64K,
+		SZ_4M,
+	};
+	struct intel_memory_region *src_mr, *dst_mr;
+	int src_id, dst_id;
+	int i, j, k;
+	int ret;
+
+	for_each_memory_region(src_mr, i915, src_id) {
+		for_each_memory_region(dst_mr, i915, dst_id) {
+			for (i = 0; i < ARRAY_SIZE(sizes); ++i) {
+				for (j = 0; j < ARRAY_SIZE(types); ++j) {
+					for (k = 0; k < ARRAY_SIZE(types); ++k) {
+						ret = _perf_memcpy(src_mr,
+								   dst_mr,
+								   sizes[i],
+								   types[j],
+								   types[k]);
+						if (ret)
+							return ret;
+					}
+				}
+			}
+		}
+	}
+
+	return 0;
+}
+
 int intel_memory_region_mock_selftests(void)
 {
 	static const struct i915_subtest tests[] = {
@@ -619,3 +810,15 @@ int intel_memory_region_live_selftests(struct drm_i915_private *i915)
 
 	return i915_live_subtests(tests, i915);
 }
+
+int intel_memory_region_perf_selftests(struct drm_i915_private *i915)
+{
+	static const struct i915_subtest tests[] = {
+		SUBTEST(perf_memcpy),
+	};
+
+	if (intel_gt_is_wedged(&i915->gt))
+		return 0;
+
+	return i915_live_subtests(tests, i915);
+}