diff options
| author | Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> | 2017-06-16 12:36:14 -0700 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-06-16 23:06:20 +0300 |
| commit | 28e0f4eef6cb3413a8eb943cd9e366793bfa7e87 (patch) | |
| tree | 031ad1f3fea8d3882dee1fbe7584fecf4f19b137 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | 95ff7c7dd7098860bc131c7dec0ad76ca61e796a (diff) | |
drm/i915: Store 9 bits of PCI Device ID for platforms with a LP PCH
Although we use 9 bits of Device ID for identifying PCH, only 8 bits are
stored in dev_priv->pch_id. This makes HAS_PCH_CNP_LP() and
HAS_PCH_SPT_LP() incorrect. Fix this by storing all the 9 bits for the
platforms with LP PCH.
v2: Drop PCH_LPT_LP change (Imre)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Fixes: commit ec7e0bb35f8d ("drm/i915/cnp: Add PCI ID for Cannonpoint LP PCH")
Reported-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1497641774-29104-1-git-send-email-dhinakaran.pandiyan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions