diff options
author | Dave Airlie <airlied@redhat.com> | 2016-07-15 13:50:58 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2016-07-15 13:50:58 +1000 |
commit | ff37c05a996bb96eccc21f4fb1b32ba0e24f3443 (patch) | |
tree | c09b09b37521f2f8f3f7a9bb3b0a33a2b3bde1a1 /drivers/gpu/drm/i915/intel_i2c.c | |
parent | 6c181c82106e12dced317e93a7a396cbb8c64f75 (diff) | |
parent | 0b2c0582f1570bfc95aa9ac1cd340a215d8e8335 (diff) |
Merge tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel into drm-next
- select igt testing depencies for CONFIG_DRM_I915_DEBUG (Chris)
- track outputs in crtc state and clean up all our ad-hoc connector/encoder
walking in modest code (Ville)
- demidlayer drm_device/drm_i915_private (Chris Wilson)
- thundering herd fix from Chris Wilson, with lots of help from Tvrtko Ursulin
- piles of assorted clean and fallout from the thundering herd fix
- documentation and more tuning for waitboosting (Chris)
- pooled EU support on bxt (Arun Siluvery)
- bxt support is no longer considered prelimary!
- ring/engine vfunc cleanup from Tvrtko
- introduce intel_wait_for_register helper (Chris)
- opregion updates (Jani Nukla)
- tuning and fixes for wait_for macros (Tvrkto&Imre)
- more kabylake pci ids (Rodrigo)
- pps cleanup and fixes for bxt (Imre)
- move sink crc support over to atomic state (Maarten)
- fix up async fbdev init ordering (Chris)
- fbc fixes from Paulo and Chris
* tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel: (223 commits)
drm/i915: Update DRIVER_DATE to 20160711
drm/i915: Select DRM_VGEM for igt
drm/i915: Select X86_MSR for igt
drm/i915: Fill unused GGTT with scratch pages for VT-d
drm/i915: Introduce Kabypoint PCH for Kabylake H/DT.
drm/i915:gen9: implement WaMediaPoolStateCmdInWABB
drm/i915: Check for invalid cloning earlier during modeset
drm/i915: Simplify hdmi_12bpc_possible()
drm/i915: Kill has_dsi_encoder
drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
drm/i915: Replace some open coded intel_crtc_has_dp_encoder()s
drm/i915: Kill has_dp_encoder from pipe_config
drm/i915: Replace manual lvds and sdvo/hdmi counting with intel_crtc_has_type()
drm/i915: Unify intel_pipe_has_type() and intel_pipe_will_have_type()
drm/i915: Add output_types bitmask into the crtc state
drm/i915: Remove encoder type checks from MST suspend/resume
drm/i915: Don't mark eDP encoders as MST capable
drm/i915: avoid wait_for_atomic() in non-atomic host2guc_action()
drm/i915: Group the irq breadcrumb variables into the same cacheline
drm/i915: Wake up the bottom-half if we steal their interrupt
...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 81de23098be7..1f266d7df2ec 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -113,7 +113,7 @@ to_intel_gmbus(struct i2c_adapter *i2c) void intel_i2c_reset(struct drm_device *dev) { - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_private *dev_priv = to_i915(dev); I915_WRITE(GMBUS0, 0); I915_WRITE(GMBUS4, 0); @@ -138,7 +138,7 @@ static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable) static u32 get_reserved(struct intel_gmbus *bus) { struct drm_i915_private *dev_priv = bus->dev_priv; - struct drm_device *dev = dev_priv->dev; + struct drm_device *dev = &dev_priv->drm; u32 reserved = 0; /* On most chips, these bits must be preserved in software. */ @@ -212,7 +212,7 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter) adapter); struct drm_i915_private *dev_priv = bus->dev_priv; - intel_i2c_reset(dev_priv->dev); + intel_i2c_reset(&dev_priv->drm); intel_i2c_quirk_set(dev_priv, true); set_data(bus, 1); set_clock(bus, 1); @@ -298,15 +298,16 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv) { int ret; -#define C ((I915_READ_NOTRACE(GMBUS2) & GMBUS_ACTIVE) == 0) - if (!HAS_GMBUS_IRQ(dev_priv)) - return wait_for(C, 10); + return intel_wait_for_register(dev_priv, + GMBUS2, GMBUS_ACTIVE, 0, + 10); /* Important: The hw handles only the first bit, so set only one! */ I915_WRITE(GMBUS4, GMBUS_IDLE_EN); - ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, + ret = wait_event_timeout(dev_priv->gmbus_wait_queue, + (I915_READ_NOTRACE(GMBUS2) & GMBUS_ACTIVE) == 0, msecs_to_jiffies_timeout(10)); I915_WRITE(GMBUS4, 0); @@ -315,7 +316,6 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv) return 0; else return -ETIMEDOUT; -#undef C } static int @@ -632,7 +632,7 @@ static const struct i2c_algorithm gmbus_algorithm = { */ int intel_setup_gmbus(struct drm_device *dev) { - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_private *dev_priv = to_i915(dev); struct intel_gmbus *bus; unsigned int pin; int ret; @@ -688,7 +688,7 @@ int intel_setup_gmbus(struct drm_device *dev) goto err; } - intel_i2c_reset(dev_priv->dev); + intel_i2c_reset(&dev_priv->drm); return 0; @@ -736,7 +736,7 @@ void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit) void intel_teardown_gmbus(struct drm_device *dev) { - struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_private *dev_priv = to_i915(dev); struct intel_gmbus *bus; unsigned int pin; |