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authorDave Airlie <airlied@redhat.com>2013-05-24 10:15:12 +1000
committerDave Airlie <airlied@redhat.com>2013-05-24 10:15:12 +1000
commit5ed77662addd586e41d9a695ec2923d3057e9dac (patch)
treebdeb4b68a8479faa781151c4b2fb7b5ab9212565 /drivers/gpu/drm/i915/intel_i2c.c
parent80ce5f6f25bea86f4fbfb9c19c09e43ccac90bfd (diff)
parent3598706b52cb45ba0a9e8aa99ce5ac59140f2b8b (diff)
Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Daniel writes: A few fixes, nothing shocking: - More Haswell pci ids. Includes a pile of marketing spare ids (which despite the spare moniker show up all over the place). - Fix a regression in handling modeset failures, resulting in black screens on 3 pipe setups when we've run out of pch plls (Chris). - Fix up the setcrtc semantics to unconditionally enable the outputs. Juding from git digging that has (kinda) always been the case and neatly fixes a few long-standing (i.e. forever) bug reports (Imre). - jiffies_timeout + 1 patches from Imre. They partially fix spurious wait_event failures in the interrupt-driven dp aux/i2c code. The other part is a core patch for the wait_event macros going in through -mm. A few patches more than strictly required since Imre is pushing for a general solution in 3.11. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: avoid premature DP AUX timeouts drm/i915: avoid premature timeouts in __wait_seqno() drm/i915: use msecs_to_jiffies_timeout instead of open coding the same drm/i915: add msecs_to_jiffies_timeout to guarantee minimum duration drm/i915: force full modeset if the connector is in DPMS OFF mode drm/i915: Propagate errors back from fb set-base drm/i915: Adding more reserved PCI IDs for Haswell.
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5d245031e391..639fe192997c 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -228,7 +228,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
* need to wake up periodically and check that ourselves. */
I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
- for (i = 0; i < msecs_to_jiffies(50) + 1; i++) {
+ for (i = 0; i < msecs_to_jiffies_timeout(50); i++) {
prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait,
TASK_UNINTERRUPTIBLE);
@@ -263,7 +263,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
/* Important: The hw handles only the first bit, so set only one! */
I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);
- ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10);
+ ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C,
+ msecs_to_jiffies_timeout(10));
I915_WRITE(GMBUS4 + reg_offset, 0);