diff options
author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2022-05-19 10:08:01 +0100 |
---|---|---|
committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2022-05-20 08:32:57 +0100 |
commit | fdbec9ff669d83bf863ca7e657af6a9e4c949565 (patch) | |
tree | 7ae8ecbceb746db47e2ed61a1d9738a7d6172044 /drivers/gpu/drm/i915/i915_pci.c | |
parent | b409db082da6b76ad2b759a1a48d9402eee4b942 (diff) |
Revert "drm/i915: Drop has_rc6 from device info"
This reverts commit 218076abbcd647de46635d21331a34b814f90906.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-7-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 3e514e34bd1d..80803ab6e938 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -376,6 +376,8 @@ static const struct intel_device_info gm45_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0), \ .has_snoop = true, \ .has_coherent_ggtt = true, \ + /* ilk does support rc6, but we do not implement [power] contexts */ \ + .has_rc6 = 0, \ .dma_mask_size = 36, \ I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ @@ -405,6 +407,7 @@ static const struct intel_device_info ilk_m_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ .has_coherent_ggtt = true, \ .has_llc = 1, \ + .has_rc6 = 1, \ .has_rc6p = 1, \ .has_rps = true, \ .dma_mask_size = 40, \ @@ -455,6 +458,7 @@ static const struct intel_device_info snb_m_gt2_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \ .has_coherent_ggtt = true, \ .has_llc = 1, \ + .has_rc6 = 1, \ .has_rc6p = 1, \ .has_reset_engine = true, \ .has_rps = true, \ @@ -514,6 +518,7 @@ static const struct intel_device_info vlv_info = { .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), .has_runtime_pm = 1, + .has_rc6 = 1, .has_reset_engine = true, .has_rps = true, .display.has_gmch = 1, @@ -612,6 +617,7 @@ static const struct intel_device_info chv_info = { .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), .has_64bit_reloc = 1, .has_runtime_pm = 1, + .has_rc6 = 1, .has_rps = true, .has_logical_ring_contexts = 1, .display.has_gmch = 1, @@ -694,6 +700,7 @@ static const struct intel_device_info skl_gt4_info = { .display.has_psr_hw_tracking = 1, \ .has_runtime_pm = 1, \ .display.has_dmc = 1, \ + .has_rc6 = 1, \ .has_rps = true, \ .display.has_dp_mst = 1, \ .has_logical_ring_contexts = 1, \ @@ -1003,6 +1010,7 @@ static const struct intel_device_info adl_p_info = { .has_logical_ring_contexts = 1, \ .has_logical_ring_elsq = 1, \ .has_mslices = 1, \ + .has_rc6 = 1, \ .has_reset_engine = 1, \ .has_rps = 1, \ .has_runtime_pm = 1, \ |