diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2023-08-10 16:46:20 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2023-08-17 15:41:30 -0700 |
| commit | 4ebf43d0488f65f50fffa35e16b60fcede3f477c (patch) | |
| tree | 1dc03e770643bdf16e370838084efb57329360e7 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | 3d623691ca300676699a56d5ec154ebcbe5d63eb (diff) | |
drm/i915: Eliminate has_4tile feature flag
We don't really need a feature flag for has_4tile since there's a
well-defined cutover point (DG2) at which all new platforms started
using Tile4 as their Y-major tiling layout. The GT side of the code
already handles Tile4 vs legacy TileY with checks on the IP version
rather than looking at the feature flag, and we can simplify the display
code similarly (which will also make it more self-contained for re-use
in the Xe driver).
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Haridhar Kalvala <haridhar.kalvala@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230810234618.3738870-4-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index fcacdc21643c..df7c261410f7 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -713,7 +713,6 @@ static const struct intel_device_info adl_p_info = { .has_3d_pipeline = 1, \ .has_64bit_reloc = 1, \ .has_flat_ccs = 1, \ - .has_4tile = 1, \ .has_global_mocs = 1, \ .has_gt_uc = 1, \ .has_llc = 1, \ |