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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-02-02 14:54:55 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-02-02 20:31:52 +0000 |
| commit | 274de876065a34ca1ff093bfacb62e440a4491be (patch) | |
| tree | 9dab3c9f0f873b5b94b5b2e79197b036d2008fa5 /drivers/gpu/drm/i915/i915_irq.c | |
| parent | d67c0ac19f9a3d900fbdf84924cb4d3aea934310 (diff) | |
drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset
Be paranoid and flush the GTIIR after clearing the CS interrupt to be
sure it has taken before we re-enable the interrupt handler. We still
see early interrupts following reset, the tasklet handling the mmio read
before it has been written by the CS. This hopefully reduces the
frequency to 0...
References: https://bugs.freedesktop.org/show_bug.cgi?id=104262
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180202145455.29876-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
0 files changed, 0 insertions, 0 deletions