diff options
author | Vinay Belgaumkar <[email protected]> | 2022-11-19 00:03:54 +0530 |
---|---|---|
committer | Rodrigo Vivi <[email protected]> | 2022-11-21 13:03:01 -0500 |
commit | 67b5655b2e717b8b681f8acd9cbddd2d687d5d4e (patch) | |
tree | 9438b43553fe5312362094f40464a93374264f93 /drivers/gpu/drm/i915/gt/intel_engine_pm.c | |
parent | 71feb6f901ecba962177a0a029dc545c91a4b396 (diff) |
drm/i915/mtl: Enable Idle Messaging for GSC CS
By defaut idle messaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments (Vinay)
- Set GSC idle hysteresis as per spec (Badal)
v3:
- Fix review comments (Rodrigo)
Bspec: 71496
Cc: Daniele Ceraolo Spurio <[email protected]>
Signed-off-by: Vinay Belgaumkar <[email protected]>
Signed-off-by: Badal Nilawar <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_engine_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_pm.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c index b0a4a2dbe3ee..e971b153fda9 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c @@ -15,6 +15,22 @@ #include "intel_rc6.h" #include "intel_ring.h" #include "shmem_utils.h" +#include "intel_gt_regs.h" + +static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine) +{ + struct drm_i915_private *i915 = engine->i915; + + if (IS_METEORLAKE(i915) && engine->id == GSC0) { + intel_uncore_write(engine->gt->uncore, + RC_PSMI_CTRL_GSCCS, + _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); + /* hysteresis 0xA=5us as recommended in spec*/ + intel_uncore_write(engine->gt->uncore, + PWRCTX_MAXCNT_GSCCS, + 0xA); + } +} static void dbg_poison_ce(struct intel_context *ce) { @@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) intel_wakeref_init(&engine->wakeref, rpm, &wf_ops); intel_engine_init_heartbeat(engine); + + intel_gsc_idle_msg_enable(engine); } /** |