diff options
| author | Takashi Iwai <[email protected]> | 2024-05-01 18:05:13 +0200 | 
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2024-05-01 18:05:13 +0200 | 
| commit | a30a7a29c35ef9d90bdec86d3051c32f47d6041f (patch) | |
| tree | 8fb47eaf32b134de050019d6205f3a3677f22d6c /drivers/gpu/drm/i915/display/intel_psr.c | |
| parent | 39815cdfc8d46ce2c72cbf2aa3d991c4bfb0024f (diff) | |
| parent | c5782bb5468acf86d8ca8e161267e8d055fb4161 (diff) | |
Merge tag 'asoc-fix-v6.9-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v6.9
This is much larger than is ideal, partly due to your holiday but also
due to several vendors having come in with relatively large fixes at
similar times.  It's all driver specific stuff.
The meson fixes from Jerome fix some rare timing issues with blocking
operations happening in triggers, plus the continuous clock support
which fixes clocking for some platforms.  The SOF series from Peter
builds to the fix to avoid spurious resets of ChainDMA which triggered
errors in cleanup paths with both PulseAudio and PipeWire, and there's
also some simple new debugfs files from Pierre which make support a lot
eaiser.
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 78 | 
1 files changed, 56 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 6927785fd6ff..b6e539f1342c 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1994,6 +1994,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)  void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)  { +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);  	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;  	struct intel_encoder *encoder; @@ -2013,6 +2014,12 @@ void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_st  	intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder),  		       crtc_state->psr2_man_track_ctl); + +	if (!crtc_state->enable_psr2_su_region_et) +		return; + +	intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), +		       crtc_state->pipe_srcsz_early_tpt);  }  static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, @@ -2051,6 +2058,20 @@ exit:  	crtc_state->psr2_man_track_ctl = val;  } +static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state, +					  bool full_update) +{ +	int width, height; + +	if (!crtc_state->enable_psr2_su_region_et || full_update) +		return 0; + +	width = drm_rect_width(&crtc_state->psr2_su_area); +	height = drm_rect_height(&crtc_state->psr2_su_area); + +	return PIPESRC_WIDTH(width - 1) | PIPESRC_HEIGHT(height - 1); +} +  static void clip_area_update(struct drm_rect *overlap_damage_area,  			     struct drm_rect *damage_area,  			     struct drm_rect *pipe_src) @@ -2095,21 +2116,36 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st   * cursor fully when cursor is in SU area.   */  static void -intel_psr2_sel_fetch_et_alignment(struct intel_crtc_state *crtc_state, -				  struct intel_plane_state *cursor_state) +intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state, +				  struct intel_crtc *crtc)  { -	struct drm_rect inter; +	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); +	struct intel_plane_state *new_plane_state; +	struct intel_plane *plane; +	int i; -	if (!crtc_state->enable_psr2_su_region_et || -	    !cursor_state->uapi.visible) +	if (!crtc_state->enable_psr2_su_region_et)  		return; -	inter = crtc_state->psr2_su_area; -	if (!drm_rect_intersect(&inter, &cursor_state->uapi.dst)) -		return; +	for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { +		struct drm_rect inter; -	clip_area_update(&crtc_state->psr2_su_area, &cursor_state->uapi.dst, -			 &crtc_state->pipe_src); +		if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc) +			continue; + +		if (plane->id != PLANE_CURSOR) +			continue; + +		if (!new_plane_state->uapi.visible) +			continue; + +		inter = crtc_state->psr2_su_area; +		if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst)) +			continue; + +		clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst, +				 &crtc_state->pipe_src); +	}  }  /* @@ -2152,8 +2188,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  {  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);  	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); -	struct intel_plane_state *new_plane_state, *old_plane_state, -		*cursor_plane_state = NULL; +	struct intel_plane_state *new_plane_state, *old_plane_state;  	struct intel_plane *plane;  	bool full_update = false;  	int i, ret; @@ -2238,13 +2273,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  		damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;  		clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src); - -		/* -		 * Cursor plane new state is stored to adjust su area to cover -		 * cursor are fully. -		 */ -		if (plane->id == PLANE_CURSOR) -			cursor_plane_state = new_plane_state;  	}  	/* @@ -2273,9 +2301,13 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  	if (ret)  		return ret; -	/* Adjust su area to cover cursor fully as necessary */ -	if (cursor_plane_state) -		intel_psr2_sel_fetch_et_alignment(crtc_state, cursor_plane_state); +	/* +	 * Adjust su area to cover cursor fully as necessary (early +	 * transport). This needs to be done after +	 * drm_atomic_add_affected_planes to ensure visible cursor is added into +	 * affected planes even when cursor is not updated by itself. +	 */ +	intel_psr2_sel_fetch_et_alignment(state, crtc);  	intel_psr2_sel_fetch_pipe_alignment(crtc_state); @@ -2338,6 +2370,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,  skip_sel_fetch_set_loop:  	psr2_man_trk_ctl_calc(crtc_state, full_update); +	crtc_state->pipe_srcsz_early_tpt = +		psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);  	return 0;  }  |