diff options
| author | Suraj Kandpal <suraj.kandpal@intel.com> | 2024-08-13 09:58:07 +0530 |
|---|---|---|
| committer | Suraj Kandpal <suraj.kandpal@intel.com> | 2024-08-15 20:09:43 +0530 |
| commit | c7085d08c7e53d9aef0cdd4b20798356f6f5d469 (patch) | |
| tree | 3570f2b023466efd42b283e338222b2ba8561da2 /drivers/gpu/drm/i915/display/intel_load_detect.c | |
| parent | dd925902634def895690426bf10e0a8b3e56f56d (diff) | |
drm/i915/pps: Disable DPLS_GATING around pps sequence
Disable bit 29 of SCLKGATE_DIS register around pps sequence
when we turn panel power on.
--v2
-Squash two commit together [Jani]
-Use IS_DISPLAY_VER [Jani]
-Fix multiline comment [Jani]
--v3
-Define register in a more appropriate place [Mitul]
--v4
-Register is already defined no need to define it again [Ville]
-Use correct WA number (lineage no.) [Dnyaneshwar]
-Fix the range on which this WA is applied [Dnyaneshwar]
Bspec: 49304
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240813042807.4015214-1-suraj.kandpal@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_load_detect.c')
0 files changed, 0 insertions, 0 deletions