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| author | Nirmoy Das <nirmoy.das@intel.com> | 2024-04-30 10:28:48 -0700 |
|---|---|---|
| committer | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2024-05-03 13:15:54 -0700 |
| commit | c01c6066e6fa6f13888f06a210f9a1d600590f42 (patch) | |
| tree | bf304374630722022ae6743baa6da4241f13e4fe /drivers/gpu/drm/i915/display/intel_frontbuffer.c | |
| parent | 1372708168e50c08bbbe092e00036701c7adf547 (diff) | |
drm/xe/device: implement transient flush
Display surfaces can be tagged as transient by mapping it using one of
the various L3:XD PAT index modes on Xe2. The expectation is that KMD
needs to request transient data flush at the start of flip sequence to
ensure all transient data in L3 cache is flushed to memory. Add a
routine for this which we can then call from the display code.
v2: rebase(RK)
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Co-developed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-18-radhakrishna.sripada@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_frontbuffer.c')
0 files changed, 0 insertions, 0 deletions