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authorJani Nikula <[email protected]>2021-09-09 15:52:01 +0300
committerJani Nikula <[email protected]>2021-09-20 18:46:40 +0300
commit79ac2b1bc9b9a1bc17b52263d940be075aa55982 (patch)
tree297ec232c3b5397f74acf5f55f2a815ad288d764 /drivers/gpu/drm/i915/display/intel_dp_mst.c
parent6114f71b3953407148158476b81c5eb082ef142b (diff)
drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0
Set the DP 2.0 128b/132b channel encoding for UHBR rates. v2: Fix UHBR port clock check, use intel_dp_is_uhbr() Bspec: 54128 Reviewed-by: Manasi Navare <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c88b08d80a96d1229ae941b296590633be4d8711.1631191763.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions