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| author | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2019-09-24 13:01:52 +0530 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2019-09-24 10:56:28 -0700 |
| commit | 6ea3cee6d77d2c5513d5a61162b209f671fb3bb8 (patch) | |
| tree | 715a70418eed9a7ce3cf32f6789824d62a68c981 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | 7dc56af5260e958e36a08b2e0822029ddf765770 (diff) | |
drm/i915: Add Pipe D cursor ctrl register for Gen12
Currently the offset for PIPE D cursor control register is missing in
i915_reg.h due to which the cursor plane cannot be enabled for Pipe D.
This also causes kernel Warning, when a user requests to enable cursor
plane for PIPE D for Gen 12 platforms.
This patch adds the CURSOR_CTL_D register in the i915_reg.h.
v2: Rebase
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111640
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
[Lucas: remove extra blank line]
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1569310312-12313-1-git-send-email-ankit.k.nautiyal@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions