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authorMatt Roper <[email protected]>2020-04-14 14:11:18 -0700
committerMatt Roper <[email protected]>2020-04-15 15:29:20 -0700
commit2a040f0d08c3811f33b9880f5c0d84cb66e8fd74 (patch)
tree3e7ad70531a42779c3144d78b39321298733c5ca /drivers/gpu/drm/i915/display/intel_dp_mst.c
parent802101528bce1065fdefb31ad7ca9480297831e7 (diff)
drm/i915/tgl: Initialize multicast register steering for workarounds
Even though the bspec is missing gen12 register details for the MCR selector register (0xFDC), this is confirmed by hardware folks to be a mistake; the register does exist and we do indeed need to steer multicast register reads to an appropriate instance the same as we did on gen11. Note that despite the lack of documentation we were still using the MCR selector to read INSTDONE and such in read_subslice_reg() too. Cc: Matt Atwood <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
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