diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-01-28 12:37:46 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-02-01 11:17:38 +0200 |
| commit | 0adc41de818c1a051c18732db57b9ee95b30898e (patch) | |
| tree | cd9e6f70a1941ebb662a75438918d9ae2c62932e /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | 5cd0664483c1be4a71bcf4ec643f5d3c782e0319 (diff) | |
drm/i915: Pass crtc+cpu_transcoder to intel_cpu_transcoder_set_m_n()
Instead of passing in the whole crtc state let's pass in just
the bits of state we need. This will help with the DRRS code
which shouldn't really be accessing the atomic state stuff directly
as it gets called outside the normal atomic flows.
v2: Fix set_m1_n1 vs. set_m2_n2 fumble for i9xx (Jani)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 4e8d65fa6086..30edb9117443 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -473,6 +473,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, struct intel_digital_port *dig_port = intel_mst->primary; struct intel_dp *intel_dp = &dig_port->dp; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_connector *connector = to_intel_connector(conn_state->connector); int ret; @@ -523,7 +524,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, intel_ddi_set_dp_msa(pipe_config, conn_state); - intel_cpu_transcoder_set_m1_n1(pipe_config, + intel_cpu_transcoder_set_m1_n1(crtc, pipe_config->cpu_transcoder, &pipe_config->dp_m_n); } |