diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-26 21:34:42 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-26 21:34:42 +0100 |
| commit | 8e22e1b3499a446df48c2b26667ca36c55bf864c (patch) | |
| tree | 5329f98b3eb3c95a9dcbab0fa4f9b6e62f0e788d /drivers/gpu/drm/amd/include | |
| parent | 00d3c14f14d51babd8aeafd5fa734ccf04f5ca3d (diff) | |
| parent | 64a577196d66b44e37384bc5c4d78c61f59d5b2a (diff) | |
Merge airlied/drm-next into drm-misc-next
Backmerge the main pull request to sync up with all the newly landed
drivers. Otherwise we'll have chaos even before 4.12 started in
earnest.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
9 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h index f9fd2ea4625b..dbc2e723f659 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h @@ -1310,5 +1310,6 @@ #define ixROM_SW_DATA_62 0xc060012c #define ixROM_SW_DATA_63 0xc0600130 #define ixROM_SW_DATA_64 0xc0600134 +#define ixCURRENT_PG_STATUS 0xc020029c #endif /* SMU_7_0_1_D_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h index 25882a4dea5d..34c6ff52710e 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h @@ -5452,5 +5452,7 @@ #define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT 0x0 #define ROM_SW_DATA_64__ROM_SW_DATA_MASK 0xffffffff #define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0 +#define CURRENT_PG_STATUS__VCE_PG_STATUS_MASK 0x00000002 +#define CURRENT_PG_STATUS__UVD_PG_STATUS_MASK 0x00000004 #endif /* SMU_7_0_1_SH_MASK_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h index a9ef1562f43b..66597c64f525 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_d.h @@ -1121,5 +1121,6 @@ #define ixROM_SW_DATA_62 0xc060011c #define ixROM_SW_DATA_63 0xc0600120 #define ixROM_SW_DATA_64 0xc0600124 +#define ixCURRENT_PG_STATUS 0xc020029c #endif /* SMU_7_1_1_D_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h index 2c997f7b5d13..fb06f2e2f6e6 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h @@ -4860,5 +4860,7 @@ #define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT 0x0 #define ROM_SW_DATA_64__ROM_SW_DATA_MASK 0xffffffff #define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0 +#define CURRENT_PG_STATUS__VCE_PG_STATUS_MASK 0x00000002 +#define CURRENT_PG_STATUS__UVD_PG_STATUS_MASK 0x00000004 #endif /* SMU_7_1_1_SH_MASK_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h index 22dd4c2b7290..4446d43d2a8f 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_d.h @@ -1271,5 +1271,6 @@ #define ixROM_SW_DATA_62 0xc060011c #define ixROM_SW_DATA_63 0xc0600120 #define ixROM_SW_DATA_64 0xc0600124 +#define ixCURRENT_PG_STATUS 0xc020029c #endif /* SMU_7_1_2_D_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h index 518fd02e9d35..627906674fe8 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h @@ -5830,5 +5830,7 @@ #define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT 0x0 #define ROM_SW_DATA_64__ROM_SW_DATA_MASK 0xffffffff #define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0 +#define CURRENT_PG_STATUS__VCE_PG_STATUS_MASK 0x00000002 +#define CURRENT_PG_STATUS__UVD_PG_STATUS_MASK 0x00000004 #endif /* SMU_7_1_2_SH_MASK_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h index eca2b851f25f..0333d880bc9e 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_d.h @@ -1244,5 +1244,5 @@ #define ixGC_CAC_ACC_CU14 0xc8 #define ixGC_CAC_ACC_CU15 0xc9 #define ixGC_CAC_OVRD_CU 0xe7 - +#define ixCURRENT_PG_STATUS 0xc020029c #endif /* SMU_7_1_3_D_H */ diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h index 1ede9e274714..654c1093d362 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h @@ -6076,5 +6076,8 @@ #define GC_CAC_OVRD_CU__OVRRD_SELECT__SHIFT 0x0 #define GC_CAC_OVRD_CU__OVRRD_VALUE_MASK 0xffff0000 #define GC_CAC_OVRD_CU__OVRRD_VALUE__SHIFT 0x10 +#define CURRENT_PG_STATUS__VCE_PG_STATUS_MASK 0x00000002 +#define CURRENT_PG_STATUS__UVD_PG_STATUS_MASK 0x00000004 + #endif /* SMU_7_1_3_SH_MASK_H */ diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h index 1d26ae768147..17b9d41f3e87 100644 --- a/drivers/gpu/drm/amd/include/cgs_common.h +++ b/drivers/gpu/drm/amd/include/cgs_common.h @@ -171,6 +171,7 @@ struct cgs_firmware_info { uint32_t ucode_start_address; void *kptr; + bool is_kicker; }; struct cgs_mode_info { |