diff options
| author | Sung Joon Kim <sungkim@amd.com> | 2024-03-15 14:48:12 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-03-27 01:43:07 -0400 |
| commit | 7b4c74cf22d7584d1eb4a959ad807d6ddf34a126 (patch) | |
| tree | 15d60ee6953a216b0b6b67038ffaf24830e52e85 /drivers/gpu/drm/amd/display | |
| parent | 1576978f05d1ee61c87c2f3e9e3086686ff29531 (diff) | |
drm/amd/display: Increase clock table size
[why&how]
To prevent out of bounds error, we need
to increase the clock table size.
Reviewed-by: Xi Liu <xi.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c index 0a4dff45731f..cf98411d0799 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c @@ -29,10 +29,7 @@ #include "dml2_translation_helper.h" #define NUM_DCFCLK_STAS 5 - -#if defined(CONFIG_DRM_AMD_DC_DCN3_51) #define NUM_DCFCLK_STAS_NEW 8 -#endif void dml2_init_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_params_st *out) { @@ -258,21 +255,20 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc, struct dml2_policy_build_synthetic_soc_states_scratch *s = &dml2->v20.scratch.create_scratch.build_synthetic_socbb_scratch; struct dml2_policy_build_synthetic_soc_states_params *p = &dml2->v20.scratch.build_synthetic_socbb_params; unsigned int dcfclk_stas_mhz[NUM_DCFCLK_STAS]; -#if defined(CONFIG_DRM_AMD_DC_DCN3_51) unsigned int dcfclk_stas_mhz_new[NUM_DCFCLK_STAS_NEW]; unsigned int dml_project = dml2->v20.dml_core_ctx.project; -#endif + unsigned int i = 0; unsigned int transactions_per_mem_clock = 16; // project specific, depends on used Memory type - p->dcfclk_stas_mhz = dcfclk_stas_mhz; - p->num_dcfclk_stas = NUM_DCFCLK_STAS; -#if defined(CONFIG_DRM_AMD_DC_DCN3_51) if (dml_project == dml_project_dcn351) { p->dcfclk_stas_mhz = dcfclk_stas_mhz_new; p->num_dcfclk_stas = NUM_DCFCLK_STAS_NEW; + } else { + p->dcfclk_stas_mhz = dcfclk_stas_mhz; + p->num_dcfclk_stas = NUM_DCFCLK_STAS; } -#endif + p->in_bbox = in_bbox; p->out_states = out; p->in_states = &dml2->v20.scratch.create_scratch.in_states; |