diff options
author | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:47:12 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2021-06-10 13:47:13 +1000 |
commit | c707b73f0cfb1acc94a20389aecde65e6385349b (patch) | |
tree | be2d0069c38a87c4f2e6c4d3e7097d5ee672a3bb /drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | |
parent | a2098e857b765bd39a9c67c81448f60d5c475846 (diff) | |
parent | 2c1b1ac7084edf477309d27c02d9da7f79b33cec (diff) |
Merge tag 'amd-drm-next-5.14-2021-06-09' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.14-2021-06-09:
amdgpu:
- SR-IOV fixes
- Smartshift updates
- GPUVM TLB flush updates
- 16bpc fixed point display fix for DCE11
- BACO cleanups and core refactoring
- Aldebaran updates
- Initial Yellow Carp support
- RAS fixes
- PM API cleanup
- DC visual confirm updates
- DC DP MST fixes
- DC DML fixes
- Misc code cleanups and bug fixes
amdkfd:
- Initial Yellow Carp support
radeon:
- memcpy_to/from_io fixes
UAPI:
- Add Yellow Carp chip family id
Used internally in the kernel driver and by mesa
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210610031649.4006-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h index acbeada5215b..2197c269e0a7 100644 --- a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h +++ b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h @@ -1,5 +1,5 @@ /* - * Copyright 2019 Advanced Micro Devices, Inc. + * Copyright 2018 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -97,6 +97,9 @@ enum mod_hdcp_status { MOD_HDCP_STATUS_HDCP2_REAUTH_REQUEST, MOD_HDCP_STATUS_HDCP2_REAUTH_LINK_INTEGRITY_FAILURE, MOD_HDCP_STATUS_HDCP2_DEVICE_COUNT_MISMATCH_FAILURE, +#if defined(CONFIG_DRM_AMD_DC_DCN3_1) + MOD_HDCP_STATUS_UNSUPPORTED_PSP_VER_FAILURE, +#endif }; struct mod_hdcp_displayport { @@ -120,6 +123,13 @@ enum mod_hdcp_display_state { MOD_HDCP_DISPLAY_ENCRYPTION_ENABLED }; +#if defined(CONFIG_DRM_AMD_DC_DCN3_1) +struct mod_hdcp_psp_caps { + uint8_t dtm_v3_supported; + uint8_t opm_state_query_supported; +}; + +#endif enum mod_hdcp_display_disable_option { MOD_HDCP_DISPLAY_NOT_DISABLE = 0, MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION, @@ -152,6 +162,9 @@ struct mod_hdcp_ddc { struct mod_hdcp_psp { void *handle; void *funcs; +#if defined(CONFIG_DRM_AMD_DC_DCN3_1) + struct mod_hdcp_psp_caps caps; +#endif }; struct mod_hdcp_display_adjustment { @@ -227,6 +240,9 @@ struct mod_hdcp_display { uint8_t index; uint8_t controller; uint8_t dig_fe; +#if defined(CONFIG_DRM_AMD_DC_DCN3_1) + uint8_t stream_enc_idx; +#endif union { uint8_t vc_id; }; @@ -239,6 +255,11 @@ struct mod_hdcp_link { enum mod_hdcp_operation_mode mode; uint8_t dig_be; uint8_t ddc_line; +#if defined(CONFIG_DRM_AMD_DC_DCN3_1) + uint8_t link_enc_idx; + uint8_t phy_idx; + uint8_t hdcp_supported_informational; +#endif union { struct mod_hdcp_displayport dp; struct mod_hdcp_hdmi hdmi; |