diff options
author | Nikola Cornij <nikola.cornij@amd.com> | 2019-08-01 15:52:58 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-23 11:38:01 -0500 |
commit | 7f6e7186f9f44918972874608022975912f03e00 (patch) | |
tree | 5489449d3636fed548873e5a800dfed5acc324e6 /drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h | |
parent | 387ad34cb7ffa589464c3ff77e5adb49026c15b4 (diff) |
drm/amd/display: Zero-out dsc init regs
[why]
Before a statically allocated PPS data structure, that did
get zeroed-out at startup, had been re-used for making packed PPS
SDP. With S3 fix, using a non-initialized PPS data structure was
introduced, while wrongly assuming it'd get initialized before it's
populated. As a consequence 'vbr_enable' and perhaps some other
fields are left uninitialized when making packed PPS SDP. This can
affect 'simple_422' as well because of the way PPS SDP packing is
done (the fields are not masked first, only shifted). The behavior
will be different, depending on the content of uninitialized data.
[how]
Zero-out PPS data structure at initialization time before it's
populated
Fixes: 1a9e3d4569fc ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end")
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h')
0 files changed, 0 insertions, 0 deletions