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| author | Yifan Zhang <yifan1.zhang@amd.com> | 2023-09-27 12:56:15 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-09 16:52:32 -0400 |
| commit | 098c13079c6fdd44f10586b69132c392ebf87450 (patch) | |
| tree | 3241e1839f92e367fc3407ae265ef590545e6851 /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | b3e73b5a8f8ae3f585abd756416b089f82578ef2 (diff) | |
drm/amd/display: enable S/G display for for recent APUs by default
With S/G display becomes stable, enable S/G display for recent APUs
by default rather than white list.
v2: explicitly disable sg on pre-CZ chips (Alex)
v3: add parens for every clause (Alex)
Co-authored-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
0 files changed, 0 insertions, 0 deletions