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authorIlya Bakoulin <[email protected]>2023-09-07 14:03:15 -0400
committerAlex Deucher <[email protected]>2023-09-26 17:00:21 -0400
commitce74bece80a914deb118bb0a0511a16ad344ffd2 (patch)
treed78d8944a1e61c29730e569bbc3c834f7c0af319 /drivers/gpu/drm/amd/display/dc/link/link_detection.c
parent1288d702080949f87688d49dfeeacc99f40adc9b (diff)
drm/amd/display: Fix DP2.0 timing sync
[Why] Triggering OTG sync before all OTG/HPO clock programming is complete causes timing sync to fail and a subsequent P-state hang. [How] Move DTB clock programming earlier in the sequence to enable_stream_timing. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/link/link_detection.c')
0 files changed, 0 insertions, 0 deletions