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authorYongqiang Sun <yongqiang.sun@amd.com>2017-11-15 16:21:34 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-12-14 10:52:51 -0500
commit5cc2687c13eecd36a66e8e22948f281dbfc38970 (patch)
tree9c3e432b591ccf4293d9a5c7660c95a7385e0c24 /drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
parent82c026d14fd2b8b0a56168227c81386a3bc0e3e1 (diff)
drm/amd/display: Implement work around for optc underflow.
Work around for a hw bug causing optc underflow if blank data double buffer disable and remove mpcc. Checking optc status after otg unlock, after wait mpcc idle check status again, if optc underflow just happens after wait mpcc idle, clear underflow status and enable blank data double buffer. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 5dc4ecf618ff..03431134c088 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -40,6 +40,7 @@ enum pipe_gating_control {
struct dce_hwseq_wa {
bool blnd_crtc_trigger;
bool DEGVIDCN10_253;
+ bool false_optc_underflow;
};
struct hwseq_wa_state {