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authorJun Lei <[email protected]>2019-05-27 14:15:27 -0400
committerAlex Deucher <[email protected]>2019-06-22 09:34:14 -0500
commit6e17b5b8a846850d73e06dc778e7d5c3ef0423f9 (patch)
tree49634762b7d6c7296eab3fd363f381a0ac3eb01b /drivers/gpu/drm/amd/display/dc/inc/hw/vmid.h
parentcf020d49b3c4ef6ab6f26be3dbf2f36b3df9f797 (diff)
drm/amd/display: update DCN2 uclk switch time
[why] value commited to by HW team is going to be higher than pre-silicon, and will cause underflow if driver not updated [how] update hardcoded value, update pstate switching logic to fix case where with long uclk time we won't allow switch even when we should Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/vmid.h')
0 files changed, 0 insertions, 0 deletions